In this work, we investigate heterojunction emitters deposited by Hot-Wire CVD on p-type crystalline silicon. The emitter structure consists of an n-doped film (20 nm) combined with a very thin intrinsic hydrogenated amorphous silicon buffer layer (5 nm). The microstructure of these films has been studied by Spectroscopic Ellipsometry in the UV-visible range. These measurements reveal that the ...

We have performed a comprehensive study into low temperature ( 500 °C) internal gettering in multicrystalline silicon (mc-Si). Two groups of as-grown mc-Si wafers from different ingot height positions were subjected to the same thermal treatments with surface passivation by either silicon nitride (SiNx:H) or a temporary iodine-ethanol (I-E) chemical solution . With either passivation scheme, l...

An AlGe eutectic wafer level bonding process is presented and characterized for heterogeneous integration of silicon photonics, CMOS integrated electronic circuits and active III-V components. Heterogeneous Integration of Photonics and CMOS The technology of silicon photonics integrated circuits (SiPIC) currently finds itself transitioning from research to industrial scale production [1]. The p...

INTRODUCTION Semiconductor devices require silicon (Si) wafers as the substrates to be manufactured with very high flatness for miniaturizing the design rule. On the other hand, the size of wafer is increasing for raising the number of device chips per a wafer for reduction of the process cost. Recently, 300 mm diameter wafers are mainly manufactured, and the feasibility study for 450 mm diamet...

Contactless measurements are attractive and more commonly used because they do not contaminate the sample and generally do not require sample preparation. After an outline of the more common contactless characterization techniques, I will discuss a few of these in more detail. In particular resistivity or doping density profiling, minority carrier lifetime, stress, temperature, layer thickness,...

Silicon samples with and without implanted layers have been imaged with a standard time-domain terahertz ~THz! imaging system. The carrier concentration and mobility of the substrate have been extracted from the frequency dependence of the THz transmittance using a simple model based on the Drude approximation. The carrier concentration of implanted layers could be determined simply from the re...

In this paper we optimize the back-to-front overlay of Through Silicon Via (TSV) patterning for a 5μm via last process. After TSV patterning, overlay verification poses a challenge because the reference layer is buried underneath the thinned silicon wafer. For both back-to-front alignment and verification a wafer stepper equipped with a Dual Side Alignment (DSA) system is used. The stepper has ...

We describe a new approach to the fabrication of surface-enhanced Raman scattering (SERS) substrates using gold nanorod (GNR) nanopowders to prepare concentrated GNR sols, followed by their deposition on an opal-like photonic crystal (OPC) film formed on a silicon wafer. For comparative experiments, we also prepared GNR assemblies on plain silicon wafers. GNR-OPC substrates combine the increase...

In the field of the functionalisation of surfaces for biological applications, we have developed Self-Assembly monolayers (SAMs) of isocyanates on oxidized silicon wafers (1,0,0) by reaction of isocyanatodecyltrichlorosilane with the Si-OH groups of the surface. Excellent reactivity of the isocyanate monolayer with different nucleophiles was demonstrated. In particular, the semicarbazide group ...