In this article, we investigate the effect of variability in p-type nanowire tunnel FET (TFET) using quantum mechanical transport simulations. The simulations have been carried out Nano Electronics Simulation Software (NESS) from University Glasgow. Random discrete dopants (RDDs) and work-function variations (WFV) investigated Our statistical reveal that key figures merit (FoMs) such as current...

The work presented in this paper is a variable threshold voltage (ΔVth) model of junction less fin gate tunnel FET (JL FinTFET) which there shift voltage. As result, to improve drive current and subthreshold slope among other devices. At the same time, gradually decrease random dopant fluctuations (RDF) effects on Vth, ambipolar leakage by using design. TFET may be modified 2D numerical simulat...

In quest of new (”post-CMOS”) switches, in particular for ultra-low power application, the Tunnel Field Effect Transistor (TFET) [1] raised a lot of attention. The working principle of this device is the generation of electron-hole pairs by band-to-band tunneling (BTBT) between the valence band (VB) and the conduction band (CB). Thus, contrary to the common MOSFET, the source of current in a TF...

The inter-band tunnel transistor (TFET) architecture features a subkT/q sub-threshold slope operation and can potentially support high ION/IOFF ratios over small gate voltages. Based on twodimensional numerical simulations, we investigate TFET in various material systems ranging from silicon to indium arsenide. TFET performance can be enhanced when heterojunctions are employed at the source sid...

Though silicon tunnel field effect transistor (TFET) has attracted attention for sub-60mV/decade subthreshold swing and very small OFF current (IOFF), its practical application is questionable due to low ON current (ION) and complicated fabrication process steps. In this paper, a new n-type classical-MOSFET-alike tunnel FET architecture is proposed, which offers sub-60mV/decade subthreshold swi...

Vertical In0.53Ga0.47As tunnel field effect transistors (TFETs) with 100nm channel length and highk/metal gate stack are demonstrated with high Ion/Ioff ratio (>10). At VDS = 0.75V, a record on-current of 20μA/μm is achieved due to higher tunneling rate in narrow tunnel gap In0.53Ga0.47As. The TFETs exhibit gate bias dependent NDR characteristics at room temperature under forward bias confirmin...

In this paper, we propose and validate a novel design for a double-gate tunnel fi eld-effect transistor (DG Tunnel FET), for which the simulations show significant improvements compared with single-gate devices using an SiO2 gate dielectric. For the fi rst time, DG Tunnel FET devices, which are using a high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current...

Keywords: HfO 2 Analytical model Surface potential Ferroelectric Nonvolatile memory Fe-TFET a b s t r a c t The implementation and operation of the nonvolatile ferroelectric memory (NVM) tunnel field effect transistors with silicon-doped HfO 2 is proposed and theoretically examined for the first time, showing that ferroelectric nonvolatile tunnel field effect transistor (Fe-TFET) can operate as...

In modern portable devices, the supply voltage is decreased to reduce the power dissipation. However as the supply voltage is scaled down below 0.4V, the normal MOSFET devices cannot be used due to lower ION/ IOFF ratio which will reduce the static power dissipation. Hence for low power applications, Tunnel FET is used as alternatives due to their higher sub threshold swing, extremely low off s...