In this report, we describe the novel RTL design methodology based on Accellera RTL semantics. We also propose the scheduling algorithm targeting bus-based architecture for the RTL design methodology. The proposed scheduling algorithm is based on resource constrained list scheduling, which considers the number of function units, storage units, buses and ports of storage units in each control st...

Even though WM-Bus is being considered to be the most promising network protocol for smart metering, it is not suitable for a sustainable real-time home energy management system (HEMS), which requires higher reliability and longer lifetime despite real time bi-directional communications. Therefore, in this paper we propose a Bitmap-wise WM-Bus (BWM-Bus), coping well with sustainable real-time H...

The bus network design problem is an important problem in transportation planning. It is the problem of determining a network of bus lines which best achieves a predetermined objective. This may be done with or without the presence of rapid transit lines. This study is devoted to solving this problem using genetic algorithm. The fitness function is defined as the benefit to the users of the bus...

Network scheduling plays an important role in Network Control System (NCS). Focused on problems of the present scheduling of CAN bus, an improved Mixed Traffic Scheduling algorithm (MTS) was proposed on the base of the communication principle of network scheduling. The cut-off time was denoted after introducing the definitions about the scheduling. The NCS model for CAN Network was created then...

This paper outlines a scheduling process for improving high-frequency bus service reliability based on a model which uses Automatic Vehicle Location and Automatic Passenger Count data. Developing a schedule for high-frequency bus routes involves balancing the costs to the passengers and the cost to the transit agency. Passengers are interested in short travel times and short, reliable waiting t...

This work presents a method of automatically generating embedded software including bus driver code from a transaction level model (TLM). For the application software, a real time operating system (RTOS) adapter is introduced to model scheduling and synchronization at C level. ANSI-C code is generated targeting this RTOS adapter. Bus drivers are also automatically created for HW/SW communicatio...