The impulse noise is caused by sharp, sudden disturbances in the image signal. Its appearance is randomly scattered white or black (or both) pixels over the image. In this paper, an efficient VLSI implementation for removing impulse noise using CLA is presented. Our result preserves the edge features and obtains excellent performances in terms of quantitative evaluation and visual quality The d...

This paper presents a new method for designing a reversible carry look-ahead adder (RCLA) based on dynamic programming. In this method, we propose a faster technique for generating carry output, which also outperforms the existing ones in terms of number of operations. In addition, we design a compact reversible carry look-ahead circuit based on the proposed technique. In order to optimize our ...

In this paper Modified Booth Multiplier (radix-4) implemented by various adder. Partial product generated by booth encoder is added by various adder techniques to compare the performance parameter of multiplier. Performance parameter like area, path delay, fan out, speed of multiplier. Multiplication is an important fundamental function in arithmetic logic operation. Since, multiplication domin...

The FFT is commonly used essential tool in digital signal processing applications .The adders used in Conventional Fast Fourier transform(FFT) are no longer appropriate for the reason that of its degraded rapidity concert. There are many dissimilar kinds of fast adders such as Carry Select Adder, Carry Save Adder and Carry Look Ahead Adder have been used for Fast Fourier Transform. However, the...

We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary multiplication. One advantage of the ternary adder is that four instead of three inputs within a binary representation will be summed up. In this paper we will compare the complexity of binary against ternary multiplier...

Reversible logic has extensive applications in quantum computing, it is a unconventional form of computing where the computational process is reversible, i.e., time-invertible. The main motivation behind the study of this technology is aimed at implementing reversible computing where they offer what is predicted to be the only potential way to improve the energy efficiency of computers beyond v...

Low power design has become one of the primary focuses in both analogue and digital VLSI circuits. Many power consumption techniques have come in existence and with that the low power design is also achieved by scaling supply voltage, considering sub-threshold region in this region thereby obtaining a minimum energy consumption which also suits for low operating frequencies. In this paper propo...

This paper presents a modified 32-bit ROM-based Direct Digital Frequency Synthesizer (DDFS). Maximum output frequency of the DDFS is limited by the structure of the accumulator used in the DDFS architecture. The hierarchical pipeline accumulator (HPA) presented in this paper has less propagation delay time rather than the conventional structures. Therefore, it results in both higher maximum ope...