It has been shown that a 32-bit logarithmic arithmetic unit can operate faster than, and maintain the accuracy of, a 32-bit floating point unit. It uses the logarithmic number system (LNS), in which a real number is represented as a fixedpoint logarithm. In this paper we investigate the implementation of three fast affine projection (FAP) algorithms using LNS. We propose a simplified Conjugate ...

This paper investigates the realization of an efficient low-complexity turbo-equalizer under fixedpoint data representation and computation constraints. We address the quantization issues that arise in the receiver design, and expose a simple computation procedure for the equalizer coefficients. The proposed solution is well-suited for a DSP implementation on low cost 16 bits fixed-point device...

This paper introduces a simple Markov process inspired by the problem of quasicrystal growth. It acts over two-letter words by randomly performing flips, a local transformation which exchanges two consecutive different letters. More precisely, only the flips which do not increase the number of pairs of consecutive identical letters are allowed. Fixed-points of such a process thus perfectly alte...

Study deals with implementations of fixed-point division modules based on different algorithms on basis of Xilinx FPGAs. We show that our implementation of the nonrestoring algorithm is significantly faster and smaller than the 32-bit IP Core “Pipelined Divider” from Xilinx. For example, the speed of the 32-bit designed module is almost 245 MHz vs. 193 MHz from Xilinx divider. Moreover, high-sp...

The Uzawa algorithm is an iterative method for the solution of saddle-point problems, which arise in many applications, including fluid dynamics. Viewing the Uzawa algorithm as a fixedpoint iteration, we explore the use of Anderson acceleration (also knownas Anderson mixing) to improve the convergence. We compare the performance of the preconditioned Uzawa algorithm with and without acceleratio...

We present a novel algorithm for collision detection between two discretely oriented polytopes (k-DOPs). It is an application of the well known Separating Axes Test to k-DOPs and is implemented in fixed-point arithmetic. Hence, it lends itself very well to hardware implementation. In this report we focus on the derivation of the algorithm and an error-bound on the rounding-error produced by the...

This paper deals with optimization techniques that can make very large vocabulary voice dictation applications deployable on recent mobile devices. We focus namely on optimization of signal parameterization (frame rate, FFT calculation, fixedpoint representation) and on efficient pruning techniques employed on the state and Gaussian mixture level. We demonstrate the applicability of the propose...

We illustrate some recent results on exact solutions to discrete-time l1-norm minimization problems with convolution constraints. A fixed-point property for this class of problems is introduced. The convolution constraints can be interpreted as a dynamic system with initial conditions. We show by construction that optimal solutions with a rational Z-transform exist for any initial conditions sa...

The complexity of modern communication systems, particularly in the wireless domain, grows at an astounding rate, which causes increasing time-to-market. In order to provide a shorter timeto-market, mostly manually performed design tasks are to be overcome and an automation of the design process is needed. This paper presents approaches for automated design steps starting with high level algori...

Effective memory utilization is critical to reap the benefits of the multi-core processors emerging on embedded systems. In this paper we explore the use of a stream model to effectively utilize memory hierarchies. We target image processing algorithms running on the Analog Devices Blackfin BF561 fixedpoint, dual-core DSP. Using optimized assembly to effectively use cores reduces runtime, but a...