1-bit full adder circuit is a very important primitive cell in the design of Application Specific Integrated Circuits. This paper presents a novel lowpower multiplexer-based 1-bit full adder that uses 12 transistors (MBA-12T). In addition to reduced transition activity and charging recycling capability, this circuit has no direct connections to power supply nodes and the entire signal gates are...

In this paper a new design of comparator is described with the help of Full adder which are the basic building block of ALU and ALU is a basic functioning unit of the microprocessors and DSP. In the world of technology it has become essential to develop various new design methodologies to reduce the power and area consumption. In this paper comparator are developed using various design of full ...

In this paper, Carry Tree Adders are Proposed. Parallel prefix adders have the best performance in VLSI Design. Parallel prefix adders gives the best performance compared to the Ripple Carry Adder (RCA) and Carry Skip Adder (CSA). Here Delay measurements are done for Kogge-Stone Adder, Sparse Kogge-Stone Adder and Spanning Tree Adder. Speed of Kogge-Stone adder and Sparse Kogge-Stone adder have...

This paper presents a novel low-power and high-speed 1-bit full-adder, which is designed based on pass transistor and TG logics. The main advantage of this design is low propagation delay and lowpower consumption, which leads to achieving lower PDP than others. Intensive HSPICE simulation shows that the new full-adder consumes around 28.5% less power than 14T adder; moreover its PDPis 30% less ...

full adder cell is often placed in the critical path of other circuits. therefore it plays an important role in determining the entire performance of digital system. moreover, portable electronic systems rely on battery and low-power design is another concern. in conclusion it is a vital task to design high-performance and low-power full adder cells. since delay opposes against power consumptio...

Quantum cellular automata (QCA) is a new technology in nano metre scale to support nanotechnology. QCA is very effective in terms of high space density and power dissipation and will be playing a major role in the development of the Quantum computer with low power consumption and high speed. This paper describes the design and layout of a 2-bit ALU based on quantum-dot cellular automata (QCA) u...

<span lang="EN-US">A new design of binary parallel adder circuit is presented in this paper. The pipeline technique applied to implement a group half (HA) blocks architect the proposed adder. pipelined carry (PCA) method suitable for carrying out desired by using HA circuits XOR and AND gates. reduces critical path delay 27% compared with ripple (RCA) relatively lowers logic gates 55% loo...

This paper presents a new design for 14 transistor single bit full adder, implemented using five transistor XNOR/XOR cell and transmission gate multiplexer. For transmission gate multiplexer complementary gate control signals are required and in 14 transistor full Adder both XOR and XNOR signals are generated. XNOR/XOR cell shows high power consumption than single XNOR gate. So, 8 transistor fu...