In the currently proposed schemes for performing a vertical handover between wireless networks, it is common for a substantial break in connectivity to occur that would be unacceptable for streamed video. This paper proposes a scheme that ensures packets are not lost, through the use of soft handover. It is shown that the client can decide when to perform a soft handover by using the difference...

Comparative performance measurements of distributed applications and network protocols require the availability of appropriate network environments. Network emulation approaches offer a flexible way to mimic the properties of a variety of networks. Existing emulation tools work either with centralized real-time simulation components, limiting the scenario size and maximum traffic, or focus on t...

The earthquake response of the stochastic structures are analysed and studied by means of the emulation technology in this paper. A kind of non-linear emulation analysis algorithm of the stochastic structure is suggested. Also, a new kind of duplicate stochastic simulation concept is put forward. On this basis, combining the delamination sampling method, two examples of the RC structure are use...

Employing an emulation capability in network simulation provides the ability for real-world traffic to interact with a simulation. The benefits of emulation include the ability to expose experimental algorithms and protocols to live traffic loads, and to test real-world protocol implementations against repeatable interference generated in simulation. This paper describes the design and implemen...

In the last few years many emulation systems have been developed to evaluate the e ectiveness of new protocols and applications in realistic and controllable network scenarios. NEPTUNE is a exible architecture for cluster-based network emulation systems designed and implemented at University of Napoli Federico II. In this poster we present the key components of the NEPTUNE architecture, an in p...

This paper presents a new approach to the design of embedded systems. Due to restrictions that state-of-theart methodologies contain for hardware/software partitioning, we have developed an emulation based method using the facilities of reconfigurable hardware components, like Field Programmable Gate Arrays (FPGA). Our own emulation environment called the SPYDER tool set was used; it is best su...

This paper presents in-circuit system-on-chip verification and debugging environment. To maximize the emulation speed, the software part is compiled natively for the host computer and the hardware part is mapped into FPGA. The two parts communicate with each other in transaction level. The operation of the hardware part and the software part is recorded independently during the emulation, and a...

Logic emulation enables designers to functionally verify complex integrated circuits prior to chip fabrication. However, traditional FPGA-based logic emulators have poor inter-chip communication bandwidth, commonly limiting gate utilization to less than 20 percent. Global routing contention mandates the use of expensive crossbar and PC-board technology in a system of otherwise low-cost, commodi...