An operational semantics of a significant subset of the Verilog Hardware Description Language (HDL) is presented. The semantics is encoded using the logic programming language Prolog in a literate programming style. This allows the associated documentation to be maintained in step with the semantics, and the printed version to be presented in a standard mathematical operational semantics style....

Flexible Application Specific Instruction set Processors (ASIP) are starting to replace monolithic ASICs in a wide variety of fields. However the construction of an ASIP is today associated with a substantial design effort. NoGap (Novel Generator of Micro Architecture and Processor) is a tool for ASIP designs, utilizing hardware multiplexed data paths. One of the main advantages of NoGap compar...

Embedded software development relies on various tools – compilers, simulators, execution time estimators – that encapsulate a more-or-less detailed knowledge of the target hardware platform. These tools can be costly to develop and maintain: significant benefits could be expected if they were automatically generated from models expressed in a dedicated modeling language. In contrast with Hardwa...

Using a stream to represent the full history of the sequence of values on a wire in a circuit makes it possible to treat components and their ports as rst-class objects in a hardware description program. Therefore the program can directly operate on the systems of recursion equations that deene the inputs and outputs of components. This provides the foundation for a simple, yet powerful, hardwa...

The Transmogrifier C hardware description language is almost identical to the C programming language, making it attractive to the large community of C-language programmers. This paper describes the semantics of the language and presents a Transmogrifier C compiler that targets the Xilinx 4000 FPGA. The compiler is operational and has produced several working circuits, including a graphics displ...

| In order to design advanced processors in a short time, designers must simulate their designs and re ect the results to the designs at the very early stages. However, conventional hardware description languages (HDLs) do not have enough ability to describe designs easily and accurately at these stages. Then, we have proposed a new hardware description language AIDL. In this paper, in order to...

Over the past years, various techniques for the embedding of hardware description languages within general purpose languages have been developed and explored. In particular, numerous HDLs embedded in strongly typed functional languages have been developed and used for different applications. A common trait of most of these languages is that they treat hardware components as functions or relatio...

With the aid of electronic design automation (EDA) computer-aided design (CAD) tools, it is now possible for engineers to design highly complex digital logic hardware circuits using only high-level circuit descriptions. Such EDA tools include software tools for graphical design input, hardware description language support, simulation, digital logic synthesis, and the creation of configuration (...

Hydra is a domain-specific language for designing digital circuits, which is implemented by embedding within Haskell. Many features required for hardware specification fit well within functional languages, leading in many cases to a perfect embedding. There are some situations, including netlist generation and software logic probes, where the DSL does not fit exactly within the host functional ...

Following the simple observation that the interconnection of a set of quantum optical input-output devices can be specified using structural mode VHSIC hardware description language, we demonstrate a computer-aided schematic capture workflow for modelling and simulating multi-component photonic circuits. We describe an algorithm for parsing circuit descriptions to derive quantum equations of mo...