Execution of arithmetic operations at a very high speed in real time is the major concern in digital signal processing (DSP) because DSP algorithms are computation intensive. In recent times, Residue Number Systems (RNS) are considered as alternative to binary number system because of their capabilities of performing “carry-free” addition based on proper selection of the modulii set. Double Bas...

An algorithm is presented for rapid traversal of octree data structures, in order to enhance the speed of ray tracing for scenes of high complexity. At each level of the octree, the algorithm generates the addresses of child voxels in the order they are penetrated by the ray. This requires only a few arithmetic operations and simple logical operations. A depth-first search of the tree is used t...

Finite field arithmetic operations, especially for the binary field GF(2 m ), have been widely used in the areas of data communication and network security applications such as errorcorrecting codes [1,2] and cryptosystems such as ECC(Elliptic Curve Cryptosystem) [3,4]. The finite field multiplication is the most frequently studied. This is because the timeconsuming operations such as exponenti...

Efficient hardware implementations of arithmetic operations in the Galois field are highly desirable for several applications, such as coding theory, computer algebra and cryptography. Among these operations, multiplication is of special interest because it is considered the most important building block. Therefore, high-speed algorithms and hardware architectures for computing multiplication a...

Abstract—Image rotation is one of main pre-processing steps for image processing or image pattern recognition. It is implemented with a rotation matrix multiplication. It requires a lot of floating point arithmetic operations and trigonometric calculations, so it takes a long time to execute. Therefore, there has been a need for a high speed image rotation algorithm without two major time-consu...

Arithmetic and memory address computation are performed using adder operations. Hence, design of adders form an important subset of electronic chip design functionality. Performance of BCD adders is to be considered with gate count, area, delay, power consumption. A new BCD adder design is attempted here to reduce the delay and thereby increasing the speed of response. BCD adder design is consi...

GUPTE, RUCHIR. Interval Arithmetic Logic Unit for DSP and Control Applications. (Under the direction of Prof. William W. Edmonson). There are many applications in the field of digital signal processing (DSP) and controls that require the user to know how various numerical errors (uncertainty) affect the result. Interval Arithmetic (IA) eliminates this uncertainty by replacing non-interval value...

Residue Number System is a kind of numerical systems that uses the remainder of division in several different moduli. Conversion of a number to smaller ones and carrying out parallel calculations on these numbers will increase the speed of the arithmetic operations in this system. However, the main factor that affects performance of system is hardware complexity of reverse converter. Reverse co...

Macrocell also based on a multiply/add approach [2]. Abstract This paper presents the architecture, design and Other researchers, including Hwang (refer to Section test of a unified arithmetic processor, developed based on 6.8 of [21]), Swartzlander [18] and Parhami [16], have recently proposed partial product bit-matrix introduced general (or universal) arithmetic architectures decomposition a...