Improving on work by Schild, De Giacomo and Lenzerini, we establish a tight connection between description logics and hybrid logics, and use this to transfer results on complexity and expressive power from one to the other.

Ladder Diagram (LD) is the most used programming language for Programmable Logical Controllers (PLCs). A PLC is a special purpose industrial computer used to automate industrial processes. Bugs in LD programs are very costly and sometimes are even a threat to human safety. We propose a model driven approach for formal verification of LD programs through model-checking. We provide a metamodel fo...

Industrial process control is an untapped market for field programmable gate arrays (FPGAs). Programs used for industrial process control are traditionally written in a graphical language called relay ladder logic, and implemented on programmable logic controllers (PLCs). The mapping of ladder logic onto typical FPGAs is a lengthy process, and results are hard to verib. We propose an FPGA archi...

We evaluate the spin-orbit and spin-spin interaction between two fermions in strongly coupled gauge theories in their Coulomb phase. We use the quasi-instantaneous character of Coulomb’s law at strong coupling to resum a class of ladder diagrams. For N = 4 SYM we derive both weak and strong coupling limits of the the spin-orbit and spin-spin interactions, and find that in the latter case these ...

This paper shows how to uniformly associate Lie algebras to the simply-laced Dynkin diagrams excluding E8 by constructing explicit combinatorial models of minuscule representations using only graph-theoretic ideas. This involves defining raising and lowering operators in a space of ideals of certain distributive lattices associated to sequences of vertices of the Dynkin diagram.

In this paper, an architecture of the RISC processor for pro-grammable logic controllers is proposed. Execution characteristics of relay ladder logic, the most common language of PLCs, are analyzed with various application programs. A conditional execution mechanism is developed to prevent pipeline hazards caused by the inherent execution behaviour of relay ladder logic. The instruction sets of...