In this work, the design of a novel low noise amplifier (LNA) based on 1μm gate-length InGaAs/InAlAs/InP pHEMT transistors is discussed. Designed for radio astronomy applications, this amplifier exploits a common drain configuration as an input stage and a common source inductive degeneration topology as an output stage. It exhibits a maximum gain of 30 dB within an input 1dB compression point ...

A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.

The LNA is implemented using 90nm CMOS technology. The cascode topology with single-ended source degeneration using inductor is employed. The high gain is achieved by using common-source (CS) amplifier. A different input matching as well as output matching topology may improve the efficiency and minimize noise of the LNA. An inductance network (Lg, Ls) is used for input matching. An interstage ...

* Department of Electrical Engineering, Technion, Haifa, Israel ([email protected]) We present our design methodology of a low-noise amplifier (LNA) in 0.18 μm CMOS technology. A 24-GHz LNA having peak gain of 13.8 dB and record low minimum noise figure of 2.8 dB at 25.1 GHz was demonstrated. High quality factor slow wave transmission lines replaced all inductors in the circuit. The LNA ...

In this paper, we present the low noise amplifier using new feedback connection configurations. The UWB LNA is design in 0.18 m TSMC CMOS technique to achieve high gain, small size and low noise. The LNA achieved 11 dB of average power gain, low 2.87 dB noise figure (NF), -10.9 dB input match, -7 dB return loss, -3 dBm of IIP3 and only 0.54 mm size with 15 mW power consumption.

Substrate noise generated by digital circuits on mixed-signal ICs can disturb the sensitive analog/RF circuits, such as Low Noise Amplifier (LNA), sharing the same substrate. This paper investigates the adverse impact of the substrate noise on a high frequency cascode LNA laid out on a lightly doped substrate. By studying the major noise coupling mechanisms, a new and efficient modeling method ...

Design of Global Positioning System (GPS) receiver with a low noise amplifier (LNA) in the front end remains a major design requirement for the success of modern day navigation and communication system. Any LNA is expected to meet the requirements like its ability to add the least amount of noise while providing sufficient gain, perfect input and output matching, and high linearity. However, mo...

This paper describes the design of wideband low noise amplifier (LNA) for Motorola application which targeted to be applied in two-way communication mobile system architecture. The technical specification was deduced from the TIA-603C standard receiver system sensitivity and intermodulation. The proposed LNA exhibit low power consumption and adopts a negative feedback wideband amplifier topolog...

A low-power, high-gain CMOS low noise amplifier (LNA) for use as the first stage of a subsampling receiver is proposed. The performance of +96-dB voltage gain and less than 1-dB Noise Figure (NF) with very low power consumption is reported for the first time and makes it suitable for subsampling mixer with Track and Hold (T/H) circuit. The LNA contains both tuned and inductorless amplifier stag...

Increasing demands of portable wireless devices have motivated the development of CMOS radio frequency integrated circuits (RFIC). In wireless system Low Noise Amplifier is the first stage of any RF Receiver design. Performance of RF receiver mainly depends on the effectiveness of LNA. The main objective of the LNA design is to get good gain with minimum noise generation for the entire operatin...