Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique characteristics will save energy consumption and decrease the chip area. In this paper we presented a low power full adder cell by using carbon nanotube field effect tr...

An Adder is one of the significant hardware blocks in most digital systems such as digital signal processors and microprocessors etc. Over the last few decades lot of research have been carried out in order to design an efficient adder circuits in terms of compactness, high speed and low power consumption. However, area and speed are two conflict parameters. So, improving speed results always i...

Nowadays, VLSI technology mainly focused on High-Speed Propagation and Low Power Consumption. Addition is an important arithmetic operation which plays a major role in digital application. Adder act as the applications of signal processing, memory access address generation Arithmetic Logic Unit. When number transistors increases system designs, makes to increase power complexity circuit. One do...

http: // www.ijrsm.com © International Journal of Research Science & Management [48] PERFORMANCE ANALYSIS OF HIGH SPEED CMOS FULL ADDER CIRCUIT FOR LOW VOLTAGE VLSI CIRCUIT DESIGN IN NANOMETER Anuj Dev & Sandip Nimade Technocrats Institute of Technology Bhopal, India DOI: 10.5281/zenodo.569383 Abstract As the technology scaling reduces the gate oxide thickness and the gate length thereby increa...

In recent years, low power circuit design has been an important issue in VLSI design areas. Adiabatic logics, which dissipate less power than static CMOS logic, have been introduced as a promising new approach in low power circuit design. energy. This paper proposes an Adder circuit based on energy efficient two-phase clocked adiabatic logic. A simulative investigation on the proposed 1-bit ful...

Power dissipation has become a major issue it has made the way to consider the performance and area so that low power is achieved. Low power is the major requirement for portable multimedia devices employing various signal processing algorithms and architectures. Any computational circuit is incomplete without the utilization of an Adder. Addition is one of the primary operations in arithmetic ...

In this paper the design of a new high-speed current mode BiCMOS logic circuits isproposed. By altering the threshold detector circuit of the conventional current mode logic circuitsand applying the multiple value logic (MVL) approach the number of transistors in basic logicoperators are significantly reduced and hence a reduction of chip area and power dissipation as wellas an increase in spee...

An adder is a digital circuit that performs addition of numbers and it plays an important role in today’s digital world. In processors and other kinds of computing devices, Adders are used in the arithmetic logic units. They are also utilized in other parts of the processors for calculating addresses, table indices, increment and decrement operations and other similar operations because it is t...

Full adders are important components in applications such as digital signal processors (DSP) architectures and micro-processors. In this paper, we propose a technique to build a total of 3 low power 10 transistor full adder using x-nor gates. We have done around 10 simulation runs of each adder for different frequencies, load capacitance and input patterns. Almost all the new adders consume les...

In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adde...