A new design approach for three-stage operational amplifiers (op-amps) is proposed. It allows to actually implement a symmetrical push-pull class-AB amplifier output stage for wellestablished three-stage amplifiers using a feedforward transconductance stage. Compared with the conventional design practice, the proposed approach leads to a significant improvement of the symmetry between the posit...

In this paper a CMOS operational amplifier is presented which operates at 2V power supply and 1uA input bias current at 0.8 um technology using non conventional mode of operation of MOS transistors and whose input is depended on bias current. The unique behaviour of the MOS transistors in subthreshold region not only allows a designer to work at low input bias current but also at low voltage. W...

In this paper, low threshold voltage (Vt) “natural” transistors, available in some n+/p+ dual poly gate CMOS/ BiCMOS processes [1], are proposed for low voltage switched capacitor circuit design. The impact of the subthreshold off-current of these low devices on the performance of analog switched-capacitor (SC) circuits is analyzed. Methods for reducing the subthreshold offcurrent in analog swi...

The main emphasis in developing DOS has been on achieving low crosstalk (CT). CT in the order of -30 dB is acceptable in conventional DOS and below that value is hard to achieve. Relatively low drive voltage (or power requirements) is also necessary to optimized DOS. This paper depicts the design of Y-branched digital optical switches (DOS) with optimized on-chip area coverage, reduced driving ...

Operational amplifiers are an integral part of many analog and mixed signal systems. As the demand for mixed mode integrated circuits increases, the design of analog circuits such as operational amplifiers in CMOS technology becomes more critical. This paper presents a two stage CMOS operational amplifier, which operates at ±1.8V power supply using TSMC 0.18um CMOS technology. The OP-AMP design...

In this paper, 1 bit full adder is built under a new hybrid logic (combination of PTL and CMOS logic) style, using 14 MOSFETs. Here we use 6transistor XOR-XNOR circuit to implement the full adder. This full adder offers full voltage swing at every nodes, higher density and high speed than the conventional CMOS design style. TSPICE is the simulator used for the simulation and bsim3v32 technology...

this paper presents a novel control method to improve the efficiency of low-voltage dc-dc converters at light loads. pulse width modulation (pwm) converters have poor efficiencies at light loads, while pulse frequency modulation (pfm) control is more efficient for the same cases. switching losses constitute a major portion of the total power loss at light loads. to decrease the switching losses...