ASIC products can provide system solutions that would not otherwise be possible with commercial offthe-shelf semiconductor devices. Reduction in system cost, volume and weight as well as increase in system performances are only few of the most obvious advantages. Sometimes, though, deciding to apply an ASIC design solution to an analogue or mixed-signal circuit can imply difficult decisions and...

As device complexity grows and fabrication costs continue to fall, test is emerging as the largest expense in complex SOC (system-onchip) IC manufacturing. At the same time, ICs continue to exponentially increase in complexity, driving up test times. Many SOC devices incorporate multiple technologies, such as high-speed logic, DRAM, flash memory, and analog circuits. Testing these circuit types...

We present a novel platform for the development and deployment of nanosensors in integrated systems. The nanosensor technology is based on ‘‘striped’’ high aspect ratio cylindrical structures grown using porous membranes as templates. These nanostructures are manipulated using dielectrophoretic forces, allowing their individual assembly and characterization. This assembly also enables the devel...

An advanced design methodology using a combination of behavioral models and transistor level models is presented in this paper. This methodology is very interesting for complex mixed-signal IC design, reducing the simulation time and improving the design flexibility. In order to validate the methodology proposed, a High-Speed Bandpass Continuous-Time Delta-Sigma Modulator is modeled. This modul...

This paper derives a family of digital non-linear waveform generators fundamental to the developement of an adaptive mixed-signal IC controller for power-factor-correction (PFC) of high-frequency switching AC-to-DC converters with the objective of significanlty lowering the cost of rectifier design. The controller application is described along with combined controller and power stage simulatio...

| Substrate crosstalk modeling and analysis techniques for a reliable SoC oriented mixed signal IC design are outlined. Substrate noise measurements by use of a source follower and a latched comparator clearly indicate that L di=dt and R i e ects on Vdd/Gnd wirings appear in the substrate. An experimental full chip substrate crosstalk veri cation system based on a macroscopic substrate noise mo...

The morphology and the distribution of material observed in SNRs reflect interaction SN blast wave with ambient environment, physical processes associated explosion internal structure progenitor star. IC 443 is a MM SNR located quite complex environment: it interacts molecular cloud NW SE areas an atomic NE. In this work we aim at investigating origin multi-thermal X-ray emission 443, through s...

For a stratified topological space we introduce the category of (mixed) IC-modules which are linear algebra devices with the relations described by the equation d = 0. We prove that the category of (mixed) IC-modules is equivalent to the category of (mixed) perverse sheaves for flag varieties.

Phase-locked loops (PLLs) are used in wireless receivers to implement a variety of functions, such as frequency synthesis, clock recovery, demodulation, and mixed-signal integrated circuits. Substrate coupling noise is a key problem in today’s large mixed-signal systems. Switching-noise generated by digital circuits can be coupled to sensitive analog circuits through the substrate, can degrade ...

With the fast growing personal communication and electronic markets system-on-chip (SoC) and system-in-package (SiP) circuit design has become an indispensable area in EDA. SoC integrates different types of circuits including digital, analog, and RF contents on one chip. SiP assembles all the electronic components including digital ICs, analog ICs, RFICs, and passive components in one package. ...