Parity checking comprises a low-redundancy method for the design of reliable digital systems. While quite effective for detecting single-bit transmission or storage errors, parity encoding has not been widely used for checking the correctness of arithmetic results because parity is not preserved during arithmetic operations and parity prediction requires fairly complex circuits in most cases. W...

In this paper, we consider the problem of counting output patterns of a circuit with gates having fan-in 2. For the case where every gate computes the same Boolean function f , Uchizawa, Wang, Morizumi and Zhou (2013) proved that the problem is solvable in polynomial time if f is the parity function or any degenerate function, while this problem is #P-complete if f is one of the other functions...

This paper presents a way to enhance the Differential Current-Switch Threshold Logic gate (DCSTL) in order to allow the gate to perform more complex functions. This enhancement is achieved by replacing the MOS-transistors at the dataand threshold mapping bank of the DCSTL gate with neuronMOS transisors. First, we introduce the neuronMOS-enhanced DCSTL gate. Then, the results of HSPICE simulatio...

Quantum logic gates can be built using linear optics, photon detection and ancillary resources in a scalable manner, as shown by Knill, Laflamme and Milburn (KLM) [1]. A number of experimental efforts are currently focused on testing the building blocks of linear optical quantum computing (LOQC) [2, 3, 4]. However, optimism for large scale quantum computation based on LOQC has been tempered by ...

A graph 1 is parity embedded in a surface if a closed path in the graph is orientation preserving or reversing according as its length is even or odd. The parity demigenus of 1 is the minimum of 2&/(S) (where / is Euler characteristic) over all surfaces S in which 1 can be parity embedded. We calculate the maximum parity demigenus over all loopless graphs of order n. As a corollary we strengthe...

We discuss the embedding of R-Parity preserving Minimal Left Right Supersym-metric models into Pati-Salam and SO(10) GUTs.

We propose an approach for quantifying a quantum circuit’s quantumness as a means to understand the nature of quantum algorithmic speedups. Since quantum gates that do not preserve the computational basis are necessary for achieving quantum speedups, it appears natural to define the quantumness of a quantum circuit using the number of such gates. Intuitively, a reduction in the quantumness requ...

We propose a scheme for implementing a multipartite quantum filter that uses entangled photons as a resource. It is shown that the success probability for the 2-photon parity filter can be as high as 1 2 , which is the highest that has so far been predicted without the help of nonlocal quantum gates. Furthermore, the required number of ancilla photons is the least of all current parity filter p...