We present a complete classification of all possible sets of classical reversible gates acting on bits, in terms of which reversible transformations they generate, assuming swaps and ancilla bits are available for free. Our classification can be seen as the reversible-computing analogue of Post’s lattice, a central result in mathematical logic from the 1940s. It is a step toward the ambitious g...

This paper proposes two reversible logic gates, HNFG and HNG. The first gate HNFG can be used as two Feynman Gates. It is suitable for a single copy of two bits with no garbage outputs. It can be used as “Copying Circuit” to increase fan-out because fan-out is not allowed in reversible circuits. The second gate HNG can implement all Boolean functions. It also can be used to design optimized add...

Power consumption is one of the important issues in VLSI design. Reversible logic produces zero power; therefore, nowadays researchers attend to it in order to optimize power. In the digital systems, one of the methods of achieving to fault tolerance is parity preserving. This paper proposes a new parity preserving reversible gate, PPRG. The most significant aspect of the PPRG gate is that it c...

Reversible logic has attracted signi cant attention in recent years. It has applications in low power CMOS, quantum computing, nanotechnology, and optical computing. Traditional gates such as AND, OR, and EXOR are not reversible. In fact NOT is the only reversible gate from the traditional set of gates. Several reversible gates have been proposed. Among them are the controlled NOT (also known a...

Now a day’s reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4:2 and 5:2 reversible compressor circuits using a new ...

This paper presents a heuristic cost minimization approach to synthes­ izing linear reversible circuits. Two bidirectional linear reversible circuit syn­ thesis methods are introduced, the Alternating Elimination with Cost Minimiza­ tion method (AECM) and the Multiple CNOT Gate method (MCG). Al­ gorithms, example syntheses, and extensions to these methods are presented. An MCG variant which inc...

It is well-known that deciding equivalence of logic circuits is a coNP-complete problem. As a corollary, the problem of deciding weak equivalence of reversible circuits, i.e. allowing initialized ancilla bits in the input and ignoring “garbage” ancilla bits in the output, is also coNP-complete. The complexity of deciding strong equivalence, including the ancilla bits, is less obvious and may de...

Reversible computation plays an important role in the synthesis of circuits having application in quantum computing, low power CMOS design, bioinformatics and nanotechnology-based systems. Conventional logic circuits are not reversible. A reversible circuit maps each input vector, into a unique output vector and vice versa. We demonstrate how the well-known and very useful, Toffoli gate can be ...

In his 2003 paper"Towards an algebraic theory of Boolean circuits", Lafont notes that the class of reversible circuits over a set of k truth values is finitely generated when k is odd. He cites a private communication for the proof. The purpose of this short note is to make the content of that communication available.

We define a hexagonal partitioned cellular automaton (HPCA), and study logical universality of a reversible HPCA. We give a specific 64-state reversible HPCA H1, and show that a Fredkin gate can be embedded in this cellular space. Since a Fredkin gate is known to be a universal logic element, logical universality of H1 is concluded. Although the number of states of H1 is greater than those of t...