This paper describes a semi-dynamic CMOS flip-flop family featuring embedded Threshold Logic functions. First, we present the concept of flip-flop featuring embedded Threshold Logic, and then we describe the circuit and its operation. Subsequently, we present the design issues and the experimental results of such Threshold Logic flip-flops, obtained in 0.25pm CMOS technology. It is shown in thi...

Dynamic CMOS logic circuits are used in high performance VLSI chips in order to achieve very high system performance. These circuits requires less number of transistors as compare to CMOS logic circuits Dynamic logic circuits are much affected by noise as compared to static CMOS circuit. This is due to the fact that dynamic logic circuits have lower value of switching threshold voltage, which i...

Domino logic circuits have faster operating speed than commonly used static logic ones, because they have lower input capacitances and no contention during transition. However, Domino logic circuits have more power dissipation than static logic ones, since their clock tress with high switch activity dissipates large energy. A low-power superthreshold computing scheme is proposed to reduce power...

In the ultra low power end of design spectrum when performance is of secondary importance, digital subthreshold logic circuits are more applicable than the regular MOS logic. In this paper, we propose two different subthreshold logic families: 1) variable threshold voltage subthreshold CMOS (VT-Sub-CMOS) and 2) subthreshold dynamic threshold voltage MOS (SubDTMOS) logic. Both these logic famili...

Threshold Logic gate is used as design abstraction for most nano devices and perceived as an alternate emerging technology to CMOS implementation. It is vulnerable to manufacturing inaccuracies that alter weight values which inadvertently affect the functionality of the gate. Hence fault tolerance should be taken in to consideration during the design of threshold logic gates to tolerate manufac...

This paper presents a new low-power Threshold Logic family featuring self lock-out and run-time reprogrammability. The simulated results have shown that, the proposed Threshold Logic dissipates between and less power and between and less energy, at , when compared with previous similar Threshold Logic families. Moreover, at , it has between and less energy and between and ! less dissipated powe...

This Letter presents a novel and extremely compact circuit topology able to implement a generalized threshold logic function with two thresholds. The circuit consists of resonant tunnelling diodes (RTDs) and heterostructure field effect transistors (HFETs). Introduction: Resonant tunneling devices are nowadays considered the most mature type of quantum-effect devices. They are already operating...

Due to the high density and the low consumption power in the digital integrated circuits, mostly technology of CMOS is used. During the past times, the Metal oxide silicon field effect transistors (MOSFET) had been used for the design and implementation of the digital integrated circuits because they are compact and also they have the less consumption power and delay to the other transistors. B...

A model for the delay of neuron-MOS (neuMOS) and Capacitive Threshold-Logic (CTL) based logic circuits is presented for the first time. It is based on the analysis of the basic neuron-MOS [l] and CTL gate structures [a]. A closed form analytic expression for the delay of the threshold gate is derived. A relation for the delay in terms of an ordinary CMOS inverter delay expressed as a function o...

Due to the high density and the low consumption power in the digital integrated circuits, mostly technology of CMOS is used. During the past times, the Metal oxide silicon field effect transistors (MOSFET) had been used for the design and implementation of the digital integrated circuits because they are compact and also they have the less consumption power and delay to the other transistors. B...