1,2 Anna University Abstract—Low noise amplifier is a crucial and essential component in RF receiver design. It amplifies the received weak RF signal with minimum noise contribution. Designing Low noise amplifier with CMOS technology is one of the important topics in research fields due to its advantages of low power, low cost and higher integration. Applications of LNA include WLAN, WSN and UW...

in this study an ultra-broad band, low-power, and high-gain cmos distributed amplifier (cmos-da) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. it is created bycascading of inductively coupled common-source (cs) stage and regulated cascode configuration (rgc).the proposed three-stage da is simulated in 0.13 μm cmos process. it achieves flat and high ...

We have developed an ultra-low noise 94 GHz MMIC amplifier using InGaAsfInAlAsfInP transistor technology. The MMIC designs incorporate a single transistor stage with input and output matching networks as well as gate and drain bias networks. Two MMICs have been incorporated into a single housing providing 10 dB of gain. At room temperature, the integrated amplifier has a measured noise of 365 K...

In this paper, analysis, simulation and design of a distributed amplifier (DA) with 0.13µm CMOS technology in the frequency range of 3-40 GHz is presented. Gain cell is a current reused circuit which is optimum in gain, noise figure, bandwidth and also power dissipation. To improve the noise performance in the frequency range of interest, a T-matching low pass filter LC network which is utilize...

In this paper the recent trends for noise figure are streamlined in concurrence to Ultra Wide Band (UWB) radio transmission spectrum. A comparative study is made between design of single-stage differential low-noise amplifier and inductor-less broadband LNAs in a digital 45 nm CMOS technology. As we move from inductor less impedance to capacitive impedance, the average noise figure decreases in...

In this paper, ultra-low-voltage and ultra-lowpower circuit techniques are presented for CMOS RF front-ends. By employing a modified current-reused architecture, the low-noise amplifier (LNA) can operate at a very low supply voltage with microwatt power consumption while maintaining reasonable circuit performance at 2.4 GHz. Using a TSMC 0.18 um CMOS process, from the simulation results, the fu...

A CMOS low noise amplifier with current folded technique has been proposed for ultra-low voltage, ultra-low power biomedical applications. The target frequency is 2.4 GHz and the proposed LNA is implemented in standard 65 and 90 nm CMOS technologies. By exploiting forward body biasing technique in current folded architecture, the LNA is biased in subthreshold region with supply voltage of 350 m...

In this paper, we present the low noise amplifier using new feedback connection configurations. The UWB LNA is design in 0.18 m TSMC CMOS technique to achieve high gain, small size and low noise. The LNA achieved 11 dB of average power gain, low 2.87 dB noise figure (NF), -10.9 dB input match, -7 dB return loss, -3 dBm of IIP3 and only 0.54 mm size with 15 mW power consumption.