In many applications counter is used to divide input clock to produce output, the frequency of the output is the divide by N times of the input clock frequency. Due to these reasons ripple counters can be used as frequency dividers to reduce a high clock frequency down to a more usable value for use in digital clocks and timing applications. In many applications such as ultra low power digital ...

Retiming is sometimes used to optimize gate-level sequential designs. This technique allows memory elements to be moved across combinational elements. Unfortunately, retiming may cause the environment of a design to wait for a few additional clock cycles after power-up to guarantee the same behavior as the original design. Leiserson and Saxe [1] presented a bound on this number of clock cycles;...