Problem Statement: In this study, we had proposed a low power architecture for high speed multiplication. Approach: The modifications to the conventional shift and add multiplier includes introduction of modified error tolerant technique for addition and enabling of adder cell by current multiplication bit of the multiplier constant. The proposed architecture enables the removal of input multip...

Floating point addition/subtraction has been designed in literature. The methods involved two’s complements add/subtract logic and XOR for counting leading zeroes. This paper proposes algorithm to perform add/subtract operation using one’s complement and counting leading zeroes for normalization using NOR operation as reduction operator for two bits of mantissa at a time. The proposed model is ...

In this paper a niethodolog! for reclucing the power consumption of shift-and-add operations in general and especially of CORDIC stages is presented. The proposed method uses the fuct of simultaneous c a r p generation in rediiiidarit carp-save and signed digit structures to predict the miriimiini necessap hardware effortfor shift-and-add operations. As a carry once generated in a certain hit p...

The Barabási-Albert (BA) model is extended to include the concept of local world and the microscopic event of adding edges. With probability p, we add a new node with m edges which preferentially link to the nodes presented in the network; with probability 1− p, we add m edges among the present nodes. A node is preferentially selected by its degree to add an edge randomly among its neighbors. U...

We investigate a class QNC(ADD) that is QNC with gates for addition of two binary numbers, where QNC is a class consisting of quantum operations computed by constant-depth quantum circuits. We show that QNC(ADD) = QAC(PAR) = QAC(MUL), where QAC(PAR) and QAC(MUL) are QAC with gates for parity and multiplication respectively, and where QAC is QNC with Toffoli gates of arbitrary fan-in. In the cla...

In Digital Signal Processing FIR Filter is used to remove the noise or unwanted components from a signal. This paper Presents an efficient VLSI Architecture of a Multi-Standard Digital Up Converter (DUC) based FIR filter that is used to remove the noise in the received channel data bits effectively. The proposed DUC based FIR filter consists of weight update block with Shift add architecture to...

lamotrigine (ltg), a newly developed antiepileptic drug (aed), is efficacious in treating refractory epilepsy. this study was designed to evaluate the efficacy and safety of ltg as add-on therapy in 40 children with refractory epilepsy. the trial was an open-labeled prospective study in children with drug-resistant epilepsy aged <14 years, who had at least 4 seizures per month in spite of recei...

Problem statement: Power dissipation is designated as critical parameter in modern VLSI design field. In VLSI implementation low power concept is necessary to meet Moore’s law and to produce consumer electronics with more back up and less weight. To save significant power consumption of a VLSI design, it is a good direction to reduce its dynamic power which is the major part of power dissipatio...