In this paper we discussed some nonlinear arithmetic operation on generalized triangular intuitionistic fuzzy numbers. Some examples and an application are given.

This work is devoted for the design and FPGA implementation of a 16bit Arithmetic module, which uses Vedic Mathematics algorithms. For arithmetic multiplication various Vedic multiplication techniques like Urdhva Tiryakbhyam Nikhilam and Anurupye has been thoroughly analyzed. Also Karatsuba algorithm for multiplication has been discussed. It has been found that Urdhva Tiryakbhyam Sutra is most ...

This paper describes a simple and efficient method of colour image compression/decompression using the fundamental application of subtraction and formation of a dynamic dictionary after three stages of subtraction. Pixels in different segments generated by a chosen mask window are adjusted such that after three stages of subtraction, either all zero or at most one non-zero element is left. The ...

Despite difficulties in general division, magnitude comparison, and sign detection, residue number system arithmetic has been used for many special-purpose systems in light of its parallelism and modularity for the most common arithmetic operations of addition/subtraction and multiplication. Computation in RNS requires modular reduction, both for the initial conversion from binary to RNS and af...

A two-stage modelling schema to be used together with arithmetic coding is proposed. Main motivation of the work has been the relatively slow operation of arithmetic coding. The new modelling schema reduces the use of arithmetic coding by applying to large white regions global modelling which consumes less time. This composite method works well and with a set of test images it took only ca. 41%...

This paper presents effective design of ternary ALU using Carbon Nano tube Field effect transistor (CNTFET) atv32 nm technology. Ternary logic is possible substitutes to traditional binary logic, because more number operation can performed using ternary logic as compare to binary logic due to this possible to achieve simplicity and energy efficient inrecent digital logic design due to reduced c...

In this paper VHDL implementation of 8-bit arithmetic logic unit (ALU) is presented. The design was implemented using VHDL Xilinx Synthesis tool ISE 13.1 and targeted for Spartan device. ALU was designed to perform arithmetic operations such as addition and subtraction using 8-bit fast adder, logical operations such as AND, OR, XOR and NOT operations, 1’s and 2’s complement operations and compa...

We describe a new exact-arithmetic approach to linear programming when the number of variables n is much larger than the number of constraints m (or vice versa). The algorithm is an implementation of the simplex method which combines exact (multiple precision) arithmetic with inexact (floating point) arithmetic, where the number of exact arithmetic operations is small and usually bounded by a f...