In present paper, I propose a method for resolving the timing delays for output signals from an asynchronous sequential system. It will be used an example of an asynchronous sequential system that will set up an output signal when an input signal will be set up. The width of the output signal depends on the input signal width, and in this case it is very short. There are many synthesis methods,...

The asynchronous systems are the models of the asynchronous circuits from the digital electrical engineering and non-anticipation is one of the most important properties in systems theory. Our present purpose is to introduce several concepts of non-anticipation of the asynchronous systems.

Asynchronous circuit elements are quiescent whenever they are not actually performing a computation, and thus they potentially waste less power than synchronous circuits. However, previous research on asymptotically non-dissipative computation has concentrated exclusively on synchronous computing models, while researchers on asynchronous circuits have ignored the issues of conservative, reversi...

In this paper we present a design tool for automatic synthesis of Verilog behavioral description of an asynchronous circuit into delay insensitive presynthesized library modules, using syntax directed techniques. Our design tool can also generate appropriate output to support implementing the circuit on ASICs and LUT-based FPGAs consequently rapid prototyping of the asynchronous circuit becomes...

Asynchronous circuits have characteristics that differ significantly from those of synchronous circuits and, as will be clear from some of the later chapters in this book, it is possible exploit these characteristics to design circuits with very interesting performance parameters in terms of their power, performance, electromagnetic emissions (EMI), etc. Asynchronous design is not yet a well-es...

We have designed an asynchronous chip for contactless smart cards. Asynchronous circuits have two power properties that make them very suitable for contactless devices: low average power and small current peaks. The fact that asynchronous circuits operate over a wide range of the supply voltage, while automatically adapting their speed, has been used to obtain a circuit that is very resilient t...

Perfect failure detectors can correctly decide whether a computer is crashed. However, it is impossible to implement a perfect failure detector in purely asynchronous systems. We show how to enforce perfect failure detection in timed asynchronous systems with hardware watchdogs. The two main system model assumptions are (1) each computer can measure time intervals with a known maximum error, an...

Asynchronous circuit design is a beautiful application area for any formalism that can reason about parallelism By means of two small but challenging exercises we illustrate the similarities and di erences between parallel program and asynchronous circuit design The exercises are simple to state and have many solutions which are sometimes surprisingly e cient They all illustrate many aspects of...

This paper presents a 3-state asynchronous CA that requires merely two transition rules to achieve computational universality. This universality is achieved by embedding Priese’s delay-insensitive circuit elements, called the E-element and the K-element, on the cell space of a so-called Brownian CA, which is an asynchronous CA containing local configurations that conduct a random walk in the ci...

This paper describes a new floating-point divider (FDIV), in which the key features of redundant binary circuits and an asynchronous clock scheme reduce the delay time and area penalty. The redundant binary representation of +1 = (1, 0), 0 = (0, 0), -1 = (0,1) is applied to the all mantissa division circuits. The simple and unified representation reduces circuit delay for the quotient determina...