We study the problem of assortative and disassortative partitions on random $d$-regular graphs. Nodes in graph are partitioned into two non-empty groups. In partition every node requires at least $H$ their neighbors to be own group. they require less than Using cavity method based analysis Belief Propagation algorithm we establish for which combinations parameters $(d,H)$ these exist with high ...

i ABSTRACT Radiation hardening by design (RHBD) has become a necessary practice when creating circuits to operate within radiated environments. While employing RHBD techniques has tradeoffs between size, speed and power, novel designs help to minimize these penalties. Space radiation is the primary source of radiation errors in circuits and two types of single event effects, single event upsets...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. The use of dual edge-triggered flip-flops can help reduce the clock frequency to half of the single edge-triggered flip-flops while maintaining the same data throughput, this thereafter translates to better performance in terms of both power dissipation and speed. Pulsetriggered flip-f...

In our previous work we proposed a Multilayer Perceptron Neural Networks (MLP NN) consisting of fuzzy flipflops (F3) based on various operations. We showed that such kind of fuzzy-neural network had good learning properties. In this paper we propose an evolutionary approach for optimizing fuzzy flip-flop networks (FNN). Various popular fuzzy operation and three different fuzzy flip-flop types w...

This paper describes the Differential Pass Transistor Pulsed Latch (DPTPL) which enhances D-Q delay and reduce power consumption using NMOS pass transistors and feedback PMOS transistors. The proposed flip-flop uses the characteristic of stronger drivability of NMOS transistor than that of transmission gate if the sum of total transistor width is the same. Positive feedback PMOS transistors enh...

This study proposes a sub-kHz clock generator by the room light illumination designed on-chip CMOS LSI chips. It generates from flicker in receiving integrated photovoltaic cell, and extracts low-pass filters, comparator, Schmidt trigger D-flip-flop to shape digital signal. The system implements two cells of large cell for power generation small photo-detection that enables standalone operation...

D flip flop is one of the fundamental building blocks in most digital designs. Many high speed digital circuits such as memory require high speed and low power consumption. In existing method, the charge keeper is used to provide strong 0 and strong 1 since it uses pass transistor for signal feed through technique. A new D Flip Flop is proposed with signal feed through technique using transmiss...

This paper describes a novel frequency-to-digital conversion technique based on the D flip-flop frequency deltasigma concept. It is shown that given some frequency constraints, there is no need for using a sampling frequency twice the maximum FM frequency. For narrow-band FM demodulation, it is further shown that by sampling the clock signal width the FM signal, the digital resolution is more e...

OBJECTIVE The objective of this article is to present the development, contents and efficacy of the FLIP&FLAP programme for children and adolescents with epilepsy, and their parents. INTERVENTION The programme is mainly directed at age-appropriately developed children and adolescents between 6 and 16 who take antiepileptic drugs. It is conducted as a 2.5-day group training programme; children...