This paper proposes a simple and efficient model for designers to estimate fault coverage for partially testuble MCMs. This model relates fault coverage, test methodology. and the ratio and distribution of DFT dies (dies with design for testability features) in an MCM. Experimental results show that our model can eflciently predict the fault coverage of a partially testable MCM with less than 5...

Fault diagnosis in the presence of noise and model errors is of fundamental importance. In the paper, the meaning of fault isolation performance is formalized by using the established notion of coverage and false coverage from the field of statistics. Then formal relations describing the relationship between fault isolation performance and the residual related design parameters are derived. For...

This paper presents a novel technique of generating tests from a random sample of faults. The entire fault population of the circuit is randomly divided into two groups. Only one group, usually the smaller one, is used for test generation by the test-generator and faultsimulator programs. This group is known as the sample and its coverage is deterministic. The coverage of faults in the remainin...

CSTP (Circular Self Test Path) is an attractive technique for testing sequential circuits in the nanometer era because it can easily provide at-speed test. But the area overhead of CSTP is high if random-pattern-resistant faults need to be reliably tested. This paper presents a deterministic CSTP (DCSTP) structure that embeds pre-computed test data with predictable area overhead. Experimental r...

As can be seen in Figure 6.1, there is a stage called test development where it basically consists of three activities; test generation, fault simulation and design for testability implementation. Test generation is a method of generating an input sequence that can distinguish between good chip and defective chip when the input sequence (test sequence) is applied to the chip using a tester. Fau...

Transformation of different types of switched-capacitor (SC) biquad filter stages based on FleischerLaker biquad SC structure in order to support oscillation based testing (OBT) have been proposed. The derived solutions are based on the generic Fleischer-Laker biquad SC structure assuming ideal characteristics of the employed components. In this paper, we explore the operation of the proposed O...

We consider two topics related to testing of synchronous sequential circuits. The first topic deals with synchronizable circuits and their synchronizing sequences. Synchronizing sequences are important in facilitating the test generation process for detectable faults, and in identifying undetectable faults. They are also important in determining whether an undetectable fault can be removed from...

A hierarchical modeling framework for the dependability evaluation of Internet-based applications is presented and illustrated on a travel agency example. Modeling is carried out considering four levels, namely: user, function, service and resource levels. The first level describes how the users invoke the application and the three remaining levels detail how the user requests are handled by th...

The mutation method assesses test quality by examining the ability of a test set to distinguish syntactic deviations representing specific types of faults from the program under test. This paper describes an empirical study performed to evaluate the effectiveness of object-oriented (OO) test strategies using the mutation method. The test sets for the experimental system are generated according ...

This paper presents techniques used in combinational test generation for multiple stuck-at faults using the parallel vector pair analysis. The techniques accelerate test generation and reduce the number of test vectors generated, while higher fault coverage is derived Experimental result for benchmark circuits shows the effectiveness of using the techniques.