نتایج جستجو برای: fault tolerant gate
تعداد نتایج: 131339 فیلتر نتایج به سال:
A conditional geometric phase shift gate, which is fault tolerant to certain types of errors due to its geometric nature, was realized recently via nuclear magnetic resonance (NMR) under adiabatic conditions. However, in quantum computation, everything must be completed within the decoherence time. The adiabatic condition makes any fast conditional Berry phase (cyclic adiabatic geometric phase)...
The homogeneous structure of field programmable gate arrays (FPGAs) suggests that the defect tolerance can be achieved by shifting the configuration data inside the FPGA. This paper proposes a new approach for tolerating the defects in FPGA’s configurable logic blocks (CLBs). The defects affecting the FPGA’s interconnection resources can also be tolerated with a high probability. This method is...
We present a simplified yet rigorous explanation of the ideas from Bomb́ın’s paper Gauge Color Codes [1]. Our discussion is self-contained, and assumes only basic concepts from quantum error correction. We provide an explicit construction of a family of color codes in arbitrary dimensions and describe some of their crucial properties. Within this framework, we explicitly show how to transversall...
Most work in quantum circuit optimization has been performed in isolation from the results of quantum fault-tolerance. Here we present a polynomial-time algorithm for optimizing quantum circuits that takes the actual implementation of fault-tolerant logical gates into consideration. Our algorithm re-synthesizes quantum circuits composed of Clifford group and T gates, the latter being typically ...
A Built-In Self-Test (BIST) approach is presented for the Internal Configuration Access Port (ICAP) and Frame Error Correcting Code (ECC) logic cores embedded in Xilinx Virtex-4 and Virtex-5 Field Programmable Gate Arrays (FPGAs). The Frame ECC logic facilitates the detection of Single Event Upsets (SEUs) in the FPGA configuration memory. The ICAP provides read and write access to the configura...
How important is fast measurement for fault-tolerant quantum computation? Using a combination of existing and new ideas, we argue that measurement times as long as even 1000 gate times or more have a very minimal effect on the quantum accuracy threshold. This shows that slow measurement, which appears to be unavoidable in many implementations of quantum computing, poses no essential obstacle to...
We derive a threshold result for fault-tolerant quantum computation for local non-Markovian noise models. The role of error amplitude in our analysis is played by the product of the elementary gate time t0 and the spectral width of the interaction Hamiltonian between system and bath. We discuss extensions of our model and the applicability of our analysis for several physical decoherence proces...
ERROR-free computation is an unattainable ideal, yet our world now contains many computers that appear error-free to their users. That such things are possible is explained by sophisticated theorems that demonstrate the possibility of efficiently reducing computational errors introduced by reasonably well-behaved noise. My thesis is about the problem of determining whether noise in prototype qu...
328 0740-7475/05/$20.00 © 2005 IEEE Copublished by the IEEE CS and the IEEE CASS IEEE Design & Test of Computers THERE IS RENEWED INTEREST in using hardware redundancy to mask faulty behavior in nanoelectronic components. In this article, we go back to the early ideas of von Neumann and review the key concepts behind Ntuple modular redundancy (NMR), hardware multiplexing, and interwoven redunda...
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