Recently, however, copper has been introduced for interconnect conductivity, replacing aluminum alloys. A variety of low-dielectric constant materials are being introduced to reduce parasitic capacitance, replacing silicon dioxide. As dimensions continue to shrink, the traditional silicon dioxide gate dielectric thickness has been reduced to the point where tunneling current has become signifi ...

The demand for new materials to be used in field-effect transistors and similar devices with low energy loss is more than ever before as integrated circuits have become a considerable source of energy consumption. One of the challenges in designing such energy efficient logic devices is finding suitable dielectric materials systems for the gate that controls the drain current in a p-type channe...

This paper describes integration of an advanced composite high-K gate stack (4nm TaSiOx-2nm InP) in the In0.7Ga0.3As quantum-well field effect transistor (QWFET) on silicon substrate. The composite high-K gate stack enables both (i) thin electrical oxide thickness (tOXE) and low gate leakage (JG) and (ii) effective carrier confinement and high effective carrier velocity (Veff) in the QW channel...

Recent experiments have demonstrated that the performances of organic FETs strongly depend on the dielectric properties of the gate insulator. In particular, it has been shown that the temperature dependence of the mobility evolves from a metallic-like to an insulating behavior upon increasing the dielectric constant of the gate material. This phenomenon can be explained in terms of the formati...

The dielectric properties of ZrO2–Al2O3 nanolaminates, deposited via atomic layer deposition, and their impact on the performance and stability of indium gallium zinc oxide and zinc tin oxide amorphous oxide semiconductor thin-film transistors TFTs are investigated. It is found that nanolaminate dielectrics can combine the advantages of constituent dielectrics and produce TFTs with improved per...

The electrical behavior of decananometer MOS transistors with high-κ dielectric gate stack has been investigated using 2D numerical simulation. Two important electrostatic limitations of high-κ materials have been analyzed and discussed in this work: i) the gate-fringing field effects which compromise short-channel performance when simultaneously increasing the dielectric constant and its physi...

A reconstruction technique of the gate capacitance from anomalous capacitance-voltage (C–V) curves in high leakage dielectric MOSFETs is presented. An RC network is used to accommodate the distributed nature of MOSFETs and an optimization technique is applied to extract the intrinsic gate capacitance. Applicability of the method is demonstrated for ultra-thin nitride/oxide (N/O 1.4 nm/0.7 nm) c...

We report on the electrical in-situ characterisation of organic thin film transistors under high vacuum conditions. Model devices in a bottom-gate/bottom-contact (coplanar) configuration are electrically characterised in-situ, monolayer by monolayer (ML), while the organic semiconductor (OSC) is evaporated by organic molecular beam epitaxy (OMBE). Thermal SiO2 with an optional polymer interface...

Conditions for the transfer printing of patterned carbon nanotube (CNT) films, along with a Au-gate, a poly methylmethacrylate (PMMA) dielectric layer and Au source-drain electrodes have been developed for the fabrication of thin-film transistors on a polyethylene terephthalate (PET) substrate. Chemical vapor deposition (CVD) grown CNTs were patterned using a photolithographic method. Transfer ...

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs...