Operation of the gate-controlled punch through transistor is demonstrated in this paper. The characteristics of the device are simulated using SILVACO atlas device simulator. This device shows high voltage, high operation frequency, and low noise properties. This punch through device can be used in high power control circuit, and also can be used for fast analog circuits for multiplication, squ...

We report on the realization of an all-optical transistor by mapping gate and source photons into strongly interacting Rydberg excitations with different principal quantum numbers in an ultracold atomic ensemble. We obtain a record switch contrast of 40% for a coherent gate input with mean photon number one and demonstrate attenuation of source transmission by over ten photons with a single gat...

The minimum supply voltage in low-voltage circuits can be defined as Vsup,min = 2(Vgs+Vsat) [1]. Low-voltage circuits are able to operate on a supply voltage of two stacked gate-source voltages and two saturation voltages. Differential amplifiers are biased with a transistor feeding a differential pair, where the current level is set by the bias transistor. The minimum input voltage in a NMOS i...

This paper proposes a new design of pass transistor logic based 2T AND gate. Performance comparison of proposed gate with traditional CMOS, complementary pass-transistor logic design and GDI techniques is presented. Different methods have been compared with respect to the number of devices, power-delay product, temperature sustainability and noise immunity in order to prove the superiority of p...

In this paper, the electrical characteristics and sensitivity analysis of staggered type p-channel heterojunction electron-hole bilayer tunnel field effect transistor (HJ-EHBTFET) are thoroughly investigated via simulation study. The minimum lattice mismatch between InAs/GaAs0.1Sb0.9 layers besides low carrier effective mass of materials provides high probability ...

An effect, in planar GaAs MESFETs, whereby a sharp increaSe in optical gain at the transistor edges occurs, is reported. This gain effect only manifests when a large resistor is inserted in ser-ies with the gate, to produce the conditions for photovoltaic gate biasing. The mechanism for increased gãin, at t'he edges, is suggested to be due to carrier photogeneration in the substrate that is sub...

In recent years several suggestions how to set up a single electron transistor have been made [1,2,3,4]. The development of new methods to contact molecules or molecule-like systems and control the electron transport through them [5,6,7] is a major issue in the promising field of molecular electronics [8,9]. The conventional setup of such a transistor requires a gate in order to trigger via the...

Conventional scaling of gate oxide thickness, source/drain extension (SDE), junction depths, and gate lengths have enabled MOS gate dimensions to be reduced from 10μm in the 1970’s to a present day size of 0.1μm. To enable transistor scaling into the 21 century, new solutions such as high dielectric constant materials for gate insulation and shallow, ultra low resistivity junctions need to be d...

According to Moore’s law, the number of transistor embedded on integrated circuit (IC) doubles approximately every two years. Thus, the size of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has to be scaled down as an increase in packing density. In current technology, the size of a transistor has shrunk below 45nm, and it has already reached its physical limit. Any attempt to shri...

A complete procedure for the design of W-band low noise amplifier in MMIC technology is presented. The design is based on a simultaneously power and noise matched technique. For implementing the method, scalable bilateral transistor model parameters should be first extracted. The model is also used for transmission line utilized in the amplifier circuit. In the presented method, input/output ma...