Quantum theory of computation establishes that there are problems for which quantum algorithms are far more efficient than their classical counterpart. Advances in quantum computing have initiated the design of systems based on quantum logic gates. Quantum computer hardware being primarily available in research laboratories at present, it mandates the ability to design, develop and test quantum...

In this paper we intend to present IEEE-754 format and comparison of Cosine Trigonometric functions used in Discrete Cosine Transform (DCT) in terms of hardware design. Here we find the cosine value by C language and Hardware Description Language (HDL) and checking the error for DCT.

In this paper we present our solution to master the complexity of product adaption cycles of a medical X-ray control unit. We present the real hardware and software platform and our mapping of it to a virtual X-ray control unit, implemented as our hardware-software co-simulation. To reduce complexity for hardware developers, we developed our own XML-based abstract system description language wh...

The paper presents method for hierarchical configurable Petri nets description in VHDL language. Dual model is an alternative way for behavioral description of the discrete control process. Dual model consists of two correlated models: UML state machine diagram and hierarchical configurable Petri net (HCfgPN). HCfgPN are Petri nets variant with direct support of exceptions handling mechanism. L...

This paper presents a logic-based structural hardware design environment, called HIDE, developed at the Queen’s University of Belfast. Central to this environment is a hardware description language which provides more abstract and elegant hardware descriptions and compositions than are possible in traditional hardware description languages such as VHDL or Verilog. The guiding principle in desig...

This study describes a hardware modeling environment of built-in-self-test (BIST) for System on Chip (SOC) testing to ease the description, verification, simulation and hardware realization on Altera FLEX10K FPGA device. The very high speed hardware description language (VHDL) model defines a main block, which describe the BIST for SOC through a behavioral and structural description. The three ...

This paper provides an overview of the VHDL AMS hardware description language for analog and mixedsignal applications like the switched mode power supply which is designed by describing the major elements or components of the system with the help of this hardware descriptive language and illustrating it using Hamster which is a simulation software for VHDL and Verilog Descriptive Language. Inde...

Various languages have been proposed to describe synchronous hardware at an abstract, yet synthesisable level. We propose a uniform framework within which such languages can be developed, and combined together for simulation, synthesis, and verification. We do this by embedding the languages in Lava — a hardware description language (HDL), itself embedded in the functional programming language ...

The ever increasingly number of transistors possible in VLSI circuits compounds the diiculty in ensuring correct designs. Formal veriication has been touted as a means of overcoming this problem, but most of the work in this area has been directed at standalone theorem provers. Before veriication is accepted by the VLSI design community, the stand alone veriication tools that are in use in the ...

This paper provides an overview of the VHDLAMS hardware description language for analog and mixedsignal applications like the phase locked loop system which is designed by describing the major elements or components of the system with the help of this hardware descriptive language and illustrating it using Hamster which is a simulation software for VHDL and Verilog Descriptive Language. Index T...