Authors: Hans Boehm, HP, [email protected] Justin Gottschlich, Intel, [email protected] Victor Luchangco, Oracle, [email protected] Maged Michael, IBM, [email protected] Mark Moir, Oracle, [email protected] Clark Nelson, Intel, [email protected] Torvald Riegel, Red Hat, [email protected] Tatiana Shpeisman, Intel, [email protected] Michael Wong, IBM,...

Many current general purpose processors use extensions to the instruction set architecture to enhance the performance of digital image processing and multimedia applications. In this paper, a MATLAB Application Program Interface (API) is constructed for the performance evaluation of Intel image processing functions. The Intel image processing functions are constructed for high performance opera...

In this note we describe the results of some tests of the message-passing performance of the Intel Paragon. These tests have been carried out under both the Intel-supplied OSF/1 operating system with an NX library, and also under an operating system called SUNMOS (Sandia UNM Operating System). For comparison with the previous generation of Intel machines, we have also included the results on th...

This white paper focuses on a particularly important new RAS feature in Intel Itanium processor 9500 series: Intel Instruction Replay Technology. This new technology provides enhanced support for automatically detecting and correcting errors in the instruction pipeline of the processor. It not only identifies a wider range of potential errors, but also corrects them almost instantly, so the del...

Craig R. Barrett became Chairman of the Board of the Intel Corporation on 18 May 2005. He became Intel’s fourth President in May of 1997 and Chief Executive Officer in 1998. He was elected to Intel’s Board of Directors in 1992 and served as Chief Operating Officer from 1993 to 1997. Barrett began his tenure at Intel as a Technology Development manager in 1974. Prior to joining Intel, Dr. Barret...