majority logic synthesis

This paper introduces the implementation of the Iterative Symmetry Indices Decomposition (ISID) for the synthesis of ternary threedimensional logic circuits. The synthesis of regular two-dimensional circuits using ISID has been introduced previously, and the synthesis of areaspecific circuits using ISID has been demonstrated. The new method is useful for the synthesis of functions using three-d...

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Iterative Combinational Logic Synthesis Techniques Using Spectral Data

1993

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LUT Mapping and Optimization for Majority-Inverter Graphs

2016

Winston Haaswijk Mathias Soeken Luca Amarù Pierre-Emmanuel Gaillardon Giovanni De Micheli

A Majority-Inverter Graph (MIG) is a directed acyclic graph in which every vertex represents a three-input majority operation and edges may be complemented to indicate operand inversion. MIGs have algebraic and Boolean properties that enable efficient logic optimization. They have been shown to obtain superior synthesis results as compared to state-of-theart And-Inverter Graph (AIG) based algor...

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Iterative Pseudo-Soft-Reliability-Based Majority-Logic Decoding for NAND Flash Memory

SYNTHESIS OF MAJORITY SINGLE-ELECTRON NANODEVICES WITH MEMORY

Logic program synthesis from first-order logic specifications

Redundancies and Don't Cares in Sequential Logic Synthesis

Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space

Iterative Combinational Logic Synthesis Techniques Using Spectral Data

LUT Mapping and Optimization for Majority-Inverter Graphs

Iterative Combinational Logic Synthesis Techniques Using Spectral Data

Modeling and Optimization of Plasmonic Detectors for Beyond-CMOS Plasmonic Majority Logic Gates

Four-Input Multi-Layer Majority Logic Circuit Based on DNA Strand Displacement Computing