Kyoung Park et al. 13 As more transistors are integrated onto bigger die, an onchip multiprocessor will become a promising alternative to the superscalar microprocessor that dominates today’s microprocessor marketplace. This paper describes key parts of a new on-chip multiprocessor, called Raptor, which is composed of four 2-way superscalar processor cores and one graphic co-processor. To obtai...

In microprocessor architectures featuring on-chip cache the majority of memory read operations are satisfied without external access. There is, however, a significant penalty associated with cache misses which require offchip accesses when the processor is stalled for some or all of the cache line refill time. This paper investigates the magnitude of the penalties associated with different cach...

For thousands of years engineers have dreamed of building machines with vision capabilities that match their own. However most image processing algorithms are computationally intensive making real-time implementation di cult, expensive and not usually possible with microprocessor based hardware. In this project a computationally intensive image-processing algorithm is implemented, analysed, and...

No particular application is well-supported by a conventional microprocessor which has a predetermined set of functional units. This is particularly true in highly dynamic areas, such as multi-media, communications and other embedded systems. We suggest that additional silicon is used to provide hardware which can be dynamically conngured to support any application. By combining a conventional ...

Today’s microprocessors with millions of transistors perform high-complexity computing at multi-gigahertz clock frequencies. The ever-increasing chip size and speed call for new methodologies in clock distribution network. Conventional global synchronization techniques exhibit many drawbacks in the advanced VLSI chips such as high-speed microprocessors. A significant percentage of the total pow...

It’s hard to believe that I’ve been asked to write an update to a paper that I co-wrote nearly 40 years ago (S.P. Morse, W.B. Pohlman, and B.W. Ravenel, “The Intel 8086 Microprocessor: A 16-bit Evolution of the 8080,” Computer, vol. 11, no. 6, 1978, pp. 18–27). In those days, 8-bit microprocessors were the state of the art, and Intel was facing a real threat when Zilog Inc. implemented an enhan...

Semiconductor transient faults (soft errors) are becoming an increasingly critical threat to reliable software execution. With the advent of the billion transistor chip era, it is impractical to protect the entire hardware. As a result, it is crucial that the tradeoffs between reliability and performance be made at the architecture design stage. To achieve this goal, researchers need a framewor...

This paper reports on the synthesis of interface between software chip model and target board in a behavioral emulation system called in-system algorithm verification engine (iSAVE). iSAVE performs in-system verification of the behavioral description of a chip in such high-level languages as C in the context of its application board at the early chip design stage. The interface between the targ...

Texas Instruments he TMS34010 is a high-performance 32-bit microprocessor with special instructions and hardware for handling the bit-field data and address manipulations often associated with computer graphics. With integrated control and addressing for dynamic random access memory (DRAM), it supports a lower system cost than would normally be associated with a 32-bit microprocessor. Internal ...

Transcription elongation is increasingly recognized as an important mechanism of gene regulation. Here, we show that microprocessor controls gene expression in an RNAi-independent manner. Microprocessor orchestrates the recruitment of termination factors Setx and Xrn2, and the 3'-5' exoribonuclease, Rrp6, to initiate RNAPII pausing and premature termination at the HIV-1 promoter through cleavag...