In this paper we develop a multi-objective model to optimally control the lead time of a multistage assembly system. The multistage assembly system is modeled as an open queueing network, whose service stations represent manufacturing or assembly operations. The arrival processes of the individual parts of the product, which should be assembled to each other in assembly stations, are assumed to...

Successive interference cancellation (SIC) refers to a family of low-complexity multiuser detection methods for directsequence code-division multiple-access systems. The performance of multistage SIC depends on the decision function used in the interference cancellation iterations, e.g., hard, soft, or linear decision functions. Due to error propagation, multistage SIC with hard data bit decisi...

Hardware implementations of the Cube, Shuffle-Exchange, and Plus-Mi us-2 (PM2I) networks are examined. An analysis is made of recirculating (single stage) networks, multistage networks of combinational logic, and pipelined multistage networks. An expanded control structure for recirculating networks is introduced. It allows each processor to select its interconnection function independently of ...

Successive interference cancellation (SIC) is a family of low complexity multiuser detection methods for DS/CDMA systems. The performance of the multistage SIC depends on the decision function used in the interference cancellation iterations, whether hard decision, soft decision or linear decision. Due to error propagation, multistage SIC with hard data bit decisions may perform more poorly tha...

the present study was conducted to investigate qualitative and quantitative aspects of irrigated wheat production in three major farming systems i.e. peasant, commercial and cooperative systems in kordestan province. accordingly, seven basic hypotheses were tested. the data were drawn from individual interviews with 360 farmers who planted wheat in 2004-2005. the sample was selected using multi...

International Symposium on Shared Memory Multiprocessing, 1991 20 Fault-Tolerant Design for Multistage Routing Networks Andr e DeHon, Thomas Knight Jr., and Henry Minsky As the size of digital systems increases, the average length of time between single component failures diminishes. To avoid component related failures, large computers must be fault-tolerant; that is, the computer must perform ...

This contribution analyzes the behaviour of CDMA (code division multiple access) systems with correlated spatial diversity. The users transmit to one or more antenna arrays. The centralized receiver employs a linear multistage detector. We provide a unified framework for the performance analysis of any linear multiuser detector representable as a multistage Wiener filter in a large system with ...

This paper describes a new technique for improving the performance of multistage parallel interference cancellation (PIC) multiuser detection. The focus of the paper is on the hard-decision multistage PIC detector due to the fact that it possesses two desirable properties: (a) very low computational complexity in binary communication systems and (b) the optimum (joint maximum likelihood) bit es...

Parallel processing is efficient form of information processing which means to implement high performance computing systems. A communication network that links processors and memory modules determines the efficiency of these parallel systems. To provide the required connectivity and performance at reasonable cost, an interconnection network is used. Hence, multistage interconnection networks ar...

Parallel processing is an area of growing interest to the computer science and engineering communities. This paper is an introduction to some of the concepts involved in the design and use of large-scale parallel systems. Parallel machines that are classified as SIMD (synchronous) and MIMD (asynchronous) systems, composed of a large number of microprocessors, are explored. Parallel algorithms a...