Large memories require too much computing resources to be fully extracted and simulated. In this paper we present an accurate power and timing modeling technique that significantly reduces characterization resources. The model is based on current controlled generators, and can be used in several regular structures. Lowpower memories are more easily characterized using this technique, since they...

Existing FPGA architectures can be classified along two dimensions: reprogrammable vs. one-time programmable and general-purpose vs. domain specific. The most challenging class of FPGA architectures to design is the reprogrammable, general-purpose FPGA, of which Xilinx is the most wellknown example. In this paper we describe Triptych, a new FPGA architecture that addresses two problems of curre...

In this paper a new ROM-less structure for binaryto-RNS conversion modulo {2 ± k} is proposed. The proposed structure is based on adders and constant multipliers units without the need for ROMs. The development of this generic structure is motivated by the inefficient performance and area occupation of structures that are generated for larger Dynamic Ranges, from the existing ROM based conversi...

Subtyping relations for the π-calculus are usually de-fined in a syntactic way, by means of structural rules. Wepropose a semantic characterisation of channel types anduse it to derive a subtyping relation.The type system we consider includes read-only andwrite-only channel types, as well as boolean combinationsof types. A set-theoretic interpretation of types is pro...

We are given a read-only memory for input and a write-only stream for output. For a positive integer parameter s, an s-workspace algorithm is an algorithm using only O(s) words of workspace in addition to the memory for input. In this paper, we present an O(n/s)-time s-workspace algorithm for subdividing a simple polygon into O(min{n/s, s}) subpolygons of complexity O(max{n/s, s}). As applicati...