This article describes an experimental laboratory system that generates and distributes random binary sequence bit streams between two optical terminals (labeled Alice and Bob). The random binary sequence is generated through probing the optical channel of a turbulent atmosphere between the two terminals with coincident laser beams. The two laser beams experience differential phase delays while...

In this study test-day records of milk (kg), fat (g), and protein (g) yields, somatic cell score (SCS, cells/ML) collected by Animal Breeding Center of Iran during 2007 and 2009 were used to estimate genetic parameters using random regression model. Models with different order of Legendre polynomials were compared using Bayesian information criterion (BIC).For milk, fat yield and SCS genetic an...

This paper describes a new manufacturing yield model for submicron VLSI circuits. This model attempts to handle process induced differences between IC layout and actual IC topography. The presented model focuses on the random nature of over and under etching phenomenon. The relevance of the new yield model in submicron domain is analyzed. Examples of yield calculations using the proposed model ...

This paper describes an analytical technique for quantifying and modeling the frequency of occurrence of integrated circuit failures. The method is based on the analysis of random and clustered defects on wafers with defect monitors. Results from pilot line data of photolithographic defects, insulator short circuits, and leaky pn junctions are presented to support the practicality of the approa...

Multiple-trait random regression animal models with simultaneous and recursive links between phenotypes for milk yield and somatic cell score (SCS) on the same test day were fitted to Canadian Holstein data. All models included fixed herd test-day effects and fixed regressions within region-age at calving-season of calving classes, and animal additive genetic and permanent environmental regress...

h EXCEPT FOR GETTING your chip to market on time, optimizing yield is perhaps the most important thing we can do to improve IC profitability. We address this problem in several ways: design for manufacturability (DFM) through layout rules, process control, and increasingly clean cleanrooms. In an ideal world, this would solve our yield problems. We know it doesn’t, so we build a diagnostic capa...