The design of high-accuracy analogue circuits is becoming a difficult task with the scaling down of supply voltages and transistor channel lengths of the current mixed-signal integrated circuits. Most of this kind of circuits require the use of the highestperformance active cell: the operational amplifier (op amp). Designers are continuously working toward tradeoff solutions between gain, input...

This letter describes the use of a power-optimized cascode configuration for obtaining maximum output power at millimeter-wave (mm-wave) frequencies for a two-way combined power amplifier (PA). The PA has been fabricated in a high-speed InP double heterojunction bipolar transistor technology and has a total active emitter area of 68.4 lm2. The experimental results demonstrate a small signal gai...

A new very high performance low voltage cascode current mirror (CM) circuit is proposed in this work. The CM utilizes the low supply voltage and low input resistance characteristics of a cascode CM. In this CM, cascode configuration is used to obtain a wide operating current range and resistance compensation technique is incorporated to increase the operating bandwidth. The peaking in frequency...

A b s t r a c t Keywords: Cascode Topology Low Noise Amplifier Noise Figure Particle Swarm Optimization Design of a LNA is a complex process. Because it involves various parameters and needs complex trade-offs. This paper presents an optimized design of a low noise amplifier (LNA) using particle swarm optimization (PSO) technique. The proposed LNA has a cascode structure with inductive source d...

To proof low voltage techniques are valid in current conveyor design, Bulk driven and composite transistor (self cascode) techniques are used to get high performance results from CCII in low voltage supply. Conventional operational amplifier circuit from literature was our choice as core of the design. Our Focus with using low voltage techniques is study the frequency characteristics of a CCII ...

Abstract In this paper, a 12-bit 100MS/s digital-to-analog converter (DAC) is presented, where segmented current steering technique employed. A “4+8” architecture used compromising the advantages and disadvantages of binary-weighted thermometer-coded DACs. Cascode source cascode switch to achieve high input impedance minimize output glitches for good linearity dynamic performance. The simulatio...

Floating Gate MOS (FGMOS) transistors can be very well implemented in lieu of conventional MOSFET for design of a low-voltage, low-power current mirror. Incredible features of flexibility, controllability and tunability of FGMOS yields better results with respect to power, supply voltage and output swing. This paper presents a new current mirror designed with FGMOS which exhibit high output imp...

A multiplexer is a unidirectional device and used in any application in which data must be switched from multiple sources to a destination. The low power circuits have become a top priority in modern VLSI design. This paper presents the power consumption comparisons and delay of various designs of 2:1 Multiplexer. The various logic styles such as Differential Cascode Voltage Switch Logic (DCVSL...

This paper presents the designing of a fully differential folded cascode operational transconductance amplifier (OTA) with common mode feedback circuit (CMFB). The designed OTA is operated in sub-threshold region to reduce the power consumption. The simulation is carried out in CADENCE environment using 150nm CMOS. The simulation result shows the DC gain of 82 dB with UGBW of 768 KHz, CMRR of 1...