For many years, silicon Physical Unclonable Functions (PUFs) have been seen as a promising and innovative security technology that was making steady progress. Today, Static Random-Access Memory (SRAM)-based PUFs offer a mature and viable security component that is achieving widespread adoption in commercial products. They are found in devices ranging from tiny sensors and microcontrollers to hi...

Magnetic random access memory (MRAM) has been considered as a promising memory technology because of its attractive properties such as non-volatility, fast access, zero standby leakage and high density. Although integrating MRAM with complementary metal-oxide-semiconductor (CMOS) logic may incur extra manufacturing cost because of the hybrid magnetic-CMOS fabrication process, it is feasible and...

Memory testing commonly faces two issues: the characterization of detailed and realistic fault models, and the definition of time-efficient test algorithms able to detect them. Among the different types of algorithms proposed for testing Static Random Access Memories (SRAMs), march tests have proven to be faster, simpler and regularly structured. The continuous evolution of the memory technolog...

A 90nm CMOS, 64Kbit, 1.16GHz, 16 port SRAM with multi-bank architecture realizing 590Gbps random access bandwidth, 41mW power dissipation at 1GHz and 0.91mm2 (13.9μm2/bit) area consumption is reported. Compared to conventional 16 port SRAM data, area and power consumption are reduced by factors 16 and 5, respectively, while maximum clock frequency is about a factor 2 higher.

MRAM is a memory (RAM) technology that uses electron spin to store information. Often been called "the ideal memory", it can potentially combine the density of DRAM with the speed of SRAM and non-volatility of FLASH memory or hard disk, and all this while consuming a very low amount of power. However, it is the need for a fast and nonvolatile computer memory that has been the key driver for evo...

This paper presents a Built In Current Sensor (BICS) design to detect soft error under both standby and operating condition in Complementary Metal Oxide Semiconductor (CMOS) Static Random Access Memory (SRAM). BICS connected in each column of SRAM cell array detects various values of current signal generated by particle strike. The generated current value is then compared with the reference val...

The scaling down of technology in CMOS circuits, results in the down scaling of threshold voltage thereby increasing the sub-threshold leakage current. LECTOR is a technique for designing CMOS circuits in order to reduce the leakage current without affecting the dynamic power dissipation, which made LECTOR a better technique in leakage power reduction when compared to all other existing leakage...

Abstract Large last-level caches (LCs) are frequently used to bridge the performance and power gap between processor and memory. Although traditional processors implement caches as SRAMs, technologies such as STT-RAM (MRAM), and eDRAM have been used and/or considered for the implementation of LCs. Each of these technologies has inherent weaknesses: SRAM is relatively low density and has high le...

Low power design has become the major challenge of present chip designs as leakage power has been rising with scaling of technologies. As modern technology is spreading fast, it is very important to design low power, high performance, and fast responding SRAM (Static Random Access Memory) since they are critical component in high performance processors. The Conventional 6T SRAM cell is very muc...

In this paper, we present the first systematic investigation of data remanence effects on an intrinsic Static Random Access Memory Physical Unclonable Function (SRAM PUF) implemented on a commercial off-the-shelf (COTS) device in a temperature range between -110◦ C and -40◦ C. Although previous studies investigated data remanence in SRAMs only at temperatures above -50◦ C, our experimental resu...