Application of built-in self-test circuitries allows to improve the testing quality and reliability of complex analog and mixed-signal IC. BIST-circuitry is integrated to original circuit for the purpose of test signal generation, measurement of output responses and decision-making about correctness of circuit under test functioning. The most part of BIST-circuitries for analog and mixed-signal...

In evaluating Analog to Digital Convertors, many parameters are checked for performance and error rate. One of these parameters is the device Effective Number of Bits. In classical testing of Effective Number of Bits, testing is based on signal to noise components ratio (SNR), whose coefficients are driven via frequency domain (Fourier Transform) of ADC’s output signal. Such a technique is extr...

The Analog and Mixed-Signal Boundary-Scan Standard (IEEE1149.4 hereafter referred as dot4) was developed to measure external discrete components in a mixed-signal Printed Circuit Assembly (PCA). This bus uses 4 of the same signals used today to support IEEE1149.1 compliant devices and systems. It uses two additional wires bus to perform analog monitoring and control. But testing a mixed-signal ...

A Built-In Self-Test (BIST) approach is described which is designed to test the analog portion of mixed-signal integrated circuits and systems. The BIST circuitry is located in the digital portion of the mixed-signal circuitry to minimize area overhead and effects on the analog portion of the mixed-signal system. The approach was evaluated using benchmark circuits for analog testing and found t...

In this paper, a new automated test generation approach for specification testing of analog circuits using test point selection and efficient analog test response waveform capture methods for enhancing the test accuracy is proposed. The proposed approach co-optimizes the construction of a multi-tone sinusoidal test stimulus and the selection of the best set of test response observation points. ...

Analog circuits have been widely used in diverse fields such as avionics, telecommunications, healthcare, and more. Detection and identification of soft faults in analog circuits subjected to component variation within standard tolerance range is critical for the development of reliable electronic systems, and thus forms the primary focus of this paper. In this paper, we have experimentally dem...

A practical approach to generate on-chip precise and slow analog ramps, intended for time-domain analog testing, monotonicity and histogram-based tests of ADCs is proposed. The technique uses an analog discrete-time adaptive scheme to calibrate the ramp generator. The lowest slope is 0.4 V/ms. Three implementations are presented for different levels of accuracy and complexity. Measurement resul...

The world market for electronic systems will reach $1 Trillion within a year and with further exponential growth over the next five years. The growth in areas such as telecommunications has increased the demand for creating single chip solutions to system. This has been achieved by integrating a number of complex sub-systems, including standard interface blocks (e.g., analog/digital converters)...

− A new simple method of single soft fault detection and localization of analog parts in embedded electronic systems controlled by microcontrollers is presented. In the pre-testing stage of the method a fault dictionary is created based on the map of localization curves. In the measurement stage the time response to a stimulating square impulse of the analog part is applied to the input of the ...

A JFET-based circuit for realizing a precision and linear floating voltage-controlled resistance (VCR) is presented for use in analog multipliers and programmable analog circuits and as a resistance mirror. It uses a matched JFET pair along with an op amp based negative feedback for realizing a precision resistance and a feedback of the source and drain voltages to the gate for realizing a line...