This paper presents a Successive Approximation Register Analog-to-Digital Converter (SAR ADC) design for sensor applications. An energy-saving switching technique is proposed to achieve ultra low power consumption. The measured Signal-to-Noise-and-Distortion Ratio (SNDR) of the ADC is 58.4 dB at 2 MS/s with an ultra-low power consumption of only 6.6 μW from a 0.8V supply, resulting in a Figure-...

1 ADC TYPES Analog-to-Digital Converters (ADCs) transform an analog voltage to a binary number (a series of 1’s and 0’s), and then eventually to a digital number (base 10) for reading on a meter, monitor, or chart. The number of binary digits (bits) that represents the digital number determines the ADC resolution. However, the digital number is only an approximation of the true value of the ana...

This paper presents an architecture of signaldependent analog-to-digital converter (ADC) based on MINIMAX sampling scheme that allows achieving high data compression rate and power reduction. The proposed architecture consists of a conventional synchronous ADC, a timer and a peak detector, and AD conversion is carried out only when input signal peaks are detected. To improve the accuracy of sig...

In this paper, an incremental Analog-toDigital Converter (ADC) designed as part of the signalconditioning circuitry for tissue impedance measurement system is presented. Continuous-time design techniques has been used and a modified implementation of the conversion algorithm, with respect to its discrete-time counterpart, has been developed. To reduce the influence of the no-idealities, analog ...

An 80MS/s analog-to-digital converter (ADC) based on single-slope conversion is presented which utilizes a recently developed gated ring oscillator (GRO) time-to-digital converter (TDC) to achieve an ENOB of 6.45 bits. To save power, the time-to-digital conversion is done in two steps, the first of which is based on coarse time quantization as measured by cycles of an oscillator and the second ...

This paper introduces novel techniques to perform analog to digital (AID) conversion, based on the quantization of the coefficients obtained by the projection of a continuoustime signal over an orthogonal space. The new AID techniques proposed here are motivated by the sampling of the input signal in domains which may lead to lower levels of signal distortion and significantly less demanding A/...

An analog comparator is one of the core units in all-optical analog-to-digital conversion (AO-ADC) systems, which digitizes different amplitude levels into two levels of logical '1' or '0' by comparing with a defined decision threshold. Although various outstanding photonic ADC approaches have been reported, almost all of them necessitate an electrical comparator to carry out this binarization....

This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling method decreases the A/D conversion time by repeatedly converting a pixel output to 4-bit after the first 12-bit A/D conversion, reducing nois...

Design of RF/IF Analog to Digital Converters for Software Radio Communication Receivers. (May 2006) Bharath Kumar Thandri, B.E. (Hons.), Birla Institute of Technology and Science (BITS), Pilani, India; M.S., Texas A&M University Chair of Advisory Committee: Dr. Jose Silva-Martinez Software radio architecture can support multiple standards by performing analogto-digital (A/D) conversion of the r...