WORKCRAFT is a plugin-based development system designed to create various mathematical models. It is integrated with such external tools as PETRIFY, PUNF and MPSAT and can simplify and partially automate the design or asynchronous systems. In this work we augment WORKCRAFT with a new plugin targeted at modelling, simulation and formal verification of digital circuits. We model a digital circuit...

We proposed the cost effective (in sense of gate number) asynchronous two-level logic. It is based on AND-OR implementation of minimized logic functions. We formulated and proved the product term minimization constraint that ensures the logic correct behaviour. We pointed out the existing tool that yields the term minimization under the constraint formulated. We processed examples and generated...

Innovations in design technologies and verification methodologies are creating complex SoCs that operate at very high speeds while incorporating optimal power management strategies to reduce power consumption. Design size inches towards multi-billion gates and designs incorporate multiple asynchronous clocks, IO-interfaces, cores and peripherals. The ever-increasing counts of asynchronous clock...

In this work we present models for asynchronous networks and their motivation and use them for the analysis of routing algorithms. We try to construct them in a way that they can be both realistic and easy to work with. For some of the models presented here variants of techniques used in the analysis of synchronous routing, like the delay sequence argument, can be adapted. On the other hand, fo...

We proposed the method of two-level (AND-OR) implementation of minimized asynchronous logic functions. We formulated and proved the product term minimization constraint that ensures the logic correct behaviour. We pointed out the existing tool that yields the term minimization under the constraint formulated. We processed examples and generated asynchronous two-level logic by applying our appro...

In this paper, we propose an asynchronous wrapper with novel handshake circuits for data communication to be used in GALS systems. The handshake circuits include two communication ports and a local clock controller. We present two approaches for the implementation of communication ports; one with pure standard cells and the other with Müller C elements.The detailed design methodology is given a...