A circuit-simulation-based method is used to determine the thermally-induced bit error rate of superconducting logic circuits. Simulations are evaluate multidimensional Gaussian integral across noise current sources attached active devices. The data-assisted and has predictive power. Measurement determines value a single parameter, effective bandwidth, for each mechanism. errors in distributed ...

Recently, we [1] proposed a simple-to-implement heuristic, namely, BIT-FILLING, for constructing high rate and high girth LDPC codes. In the present work, we extend BIT-FILLING, and demonstrate that the extended algorithm produces better codes, that is, codes with higher rate/girth and good bit error rate performance. We demonstrate the positive effect of girth on bit error rate performance.