نتایج جستجو برای: chip optical interconnects

تعداد نتایج: 315995  

1999
Krishna C. Saraswat David A. B. Miller Mark Horowitz Frank Chang

Several studies have shown that the evolutionary approaches being used to solve the problems imposed by interconnects will eventually encounter fundamental limits and may be a major factor in impeding the advances in the integrated electronics. Therefore, revolutionary new techniques will be needed to provide a paradigm shift to continue the progress in integrated electronics. Examples of such ...

2007
Y.-C. Chang L. A. Coldren

Introduction: Recently, VCSELs have received considerable interest for short-distance optical interconnects owing to their small footprint, natural occurrence in arrays and, most importantly, cost effectiveness. Two of the main challenges for the devices to be used in board-toboard and chip-to-chip interconnects are speed and power dissipation. For directly modulated lasers, higher speed can be...

Journal: :Optics express 2011
A Brimont D J Thomson P Sanchis J Herrera F Y Gardes J M Fedeli G T Reed J Martí

While current optical communication networks efficiently carry and process huge amounts of digital information over large and medium distances, silicon photonics technology has the capacity to meet the ceaselessly increasing demand for bandwidth via energy efficient, inexpensive and mass producible short range optical interconnects. In this context, handling electrical-to-optical data conversio...

2011
Trung-Thanh Le

-Chip level optical links based on VLSI photonic integrated circuits have been proposed to replace metal electrical data paths in cases where high frequencies make electrical traces impractical. This is especially relevant to highspeed clock signals as silicon CMOS circuit technology is scaled higher in speed to the GHz range and beyond. In this paper, the realization of optical couplers and po...

2000
Donald M. Chiarulli Steven P. Levitan

In this paper, we present a new packaging architecture for chip-level optical interconnections based on imaging fiber bundles. Imaging fiber bundles consist of densely packed arrays of small core fibers such that an object imaged at one end of the bundle is correspondingly imaged on the opposite end. In optical communication applications fiber bundles can be directly coupled to an array of opti...

Journal: :IEICE Transactions 2007
Akira Tsuchiya Masanori Hashimoto Hidetoshi Onodera

This paper discusses the resistive termination of on-chip high-performance interconnects. Resistive termination is effective to improve the bandwidth of on-chip interconnects, on the other hands, increases the power dissipation and the area. Therefore trade-off analysis about resistive termination is necessary. This paper proposes a method to determine the termination of on-chip interconnects. ...

2000
Ashok V. Krishnamoorthy

The concept of a manufacturable technology that can provide parallel optical interconnects directly to a VLSI circuit, proposed over 15 years ago in [1], now appears to be a reality. One such optoelectronic-VLSI (OE-VLSI) technology is based on the hybrid flip-chip area-bonding of GaAs/AlGaAs Multiple-Quantum Well (MQW) electro-absorption modulator devices directly onto active silicon CMOS circ...

2013
Josef A. Nossek Peter Russer Tobias Noll Amine Mezghani Michel T. Ivrlač Matthias Korb Farooq Mukhtar Hristomir Yordanov Johannes A. Russer

In high-performance integrated circuits manufactured in CMOS deep sub-micron technology, the speed of global information exchange on the chip has developed into a bottleneck, that limits the effective information processing speed. This is caused by standard on-chip communication based on multi-conductor interconnects, e.g., implemented as parallel interconnect buses. The supported clock frequen...

Journal: :Applied optics 2003
Andrew G Kirk David V Plant Ted H Szymanski Zvonko G Vranesic Frank A P Tooley David R Rolston Michael H Ayliffe Frederic K Lacroix Brian Robertson Eric Bernier Daniel F Brosseau

Design and implementation of a free-space optical backplane for multiprocessor applications is presented. The system is designed to interconnect four multiprocessor nodes that communicate by using multiplexed 32-bit packets. Each multiprocessor node is electrically connected to an optoelectronic VLSI chip which implements the hyperplane interconnection architecture. The chips each contain 256 o...

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