For realizing a single chip microwave front-end, we studied the new design theory of impedance matching circuits for a Si-CMOS low noise amplifier (LNA) or power amplifier (PA), which are composed of coplanar waveguide (CPW) meanderline resonators and impedance inverters. We also present the simulated performances of CMOS-LNA or PA connected with input and output matching circuits. Finally, we ...

In this paper we present low-power 77-GHz power amplifier (PA) for the long range automotive radar. The proposed amplifier is designed using TSMC 0.13-μm RF CMOS (fT/fmax=120/140 GHz) technology, and it is powered by a 1.5V supply. To reduce power dissipation, we consider bias voltage, transistor size optimization, matchings and layout optimization. To improve power gain of the amplifier, it ha...

A new continuous-time CMOS current comparator having high speed and low power is proposed as an important component of current mode signal processing unit. It comprises of CMOS complementary amplifier with a feedback MOS resistor, two resistive load amplifiers and two CMOS inverters. Short response delay, low power consumption and small area are some of its features. Due to the absence of bias ...

In this work, we analyze the effects of an inter-stage capacitor located between the power stage input and the driver stage output on the overall efficiency of a RF CMOS power amplifier and on gate-drain reliability problems. To verify the analyzed effects, we designed a RF CMOS power amplifier with a center frequency of 1.85GHz. Class-D amplifiers with a feedback resistor are used as driver st...

A CMOS self-biased fully differential amplifier is presented. Due to the self-biasing structure of the amplifier and its associated negative feedback, the amplifier is compensated to achieve low sensitivity to process, supply voltage and temperature (PVT) variations. The output common-mode voltage of the amplifier is adjusted through the same biasing voltages provided by the common-mode feedbac...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. This paper presents a design of input stage of Operational Amplifier i.e cascode differential amplifier using a standard 65nm CMOS Technology.A comparison betweem gate-driven, bulk-driven and cascode bulk driven bulk-driven differential amplifier is described. The Results demonstrate t...

This paper demonstrated the first 2-stage, 2.8W, 1.8V, 1.9GHz fully-integrated DAT power amplifier with 500 input and output matching using 0.18pm CMOS transistors. It has a small-signal gain of 27dB. The amplifier provides 2.8W of power into a 50n load with a PAE of 50%.

This paper demonstrated the first 2-stage, 2.8W, 1.8V, 1.9GHz fully-integrated DAT power amplifier with 50Ω input and output matching using 0.18μm CMOS transistors. It has a small-signal gain of 27dB. The amplifier provides 2.8W of power into a 50Ω load with a PAE of 50%.