نتایج جستجو برای: deep sub micron technologies
تعداد نتایج: 620929 فیلتر نتایج به سال:
There is a growing need for accurate power models at the higher levels of design hierarchy. CACTI is a micro-architecture level tool widely used (i) to estimate power dissipation in caches and (ii) to determine the cache configuration that best meets the desired optimization criterion. However, we observed several limitations in CACTI that lead to inaccuracies in cache power estimates especiall...
The concept of improving the timing behavior of a circuit by relocating registers is called retiming and was "rst presented by Leiserson and Saxe. They showed that the problem of determining an equivalent minimum area (total number of registers) circuit is polynomial-time solvable. In this work, we show how this approach can be reapplied in the deep sub-micron domain when area-delay trade-o!s a...
A variety of prebiotic syntheses starting from reduced and gas precursors, or small reactive organic intermediates produce a variety of micron and sub-micron sized organic microstructures, including spheres, filaments and toroids. Many of these structures are hollow, and they display dynamic and reversible self-assembly. We report here some of their physical characteristics that might be compat...
Superconducting QUantum Interference Device (SQUID) microscopy has excellent magnetic field sensitivity, but suffers from modest spatial resolution when compared with other scanning probes. This spatial resolution is determined by both the size of the field sensitive area and the spacing between this area and the sample surface. In this paper we describe scanning SQUID susceptometers that achie...
In high-speed high-resolution analog to digital converters, comparators have a key role in quality of performance. High power consumption and delay is one of the drawbacks of these circuits which can be reduced by using suitable architectures. Many versions of comparator are proposed to achieve desirable output in sub-micron and deep sub-micron design technologies. Back to back inverter in the ...
The evolution of Integrated Circuit designing has been a real game changer in the field of VLSI system in the past quarter century. Very deep sub-micron (VDSM) technologies embracing sub-100nm wafer design technologies, to take advantage of the superior integration possibilities. At these technologies, many phenomena affect gate, path delay or wire delays. Now a days, crosstalk noise or crossta...
confirm benefits of a deep sub-micron FD-SOI and to identify possible issues concerning front-end circuits with the FD-SOI, we have submitted a small design to Oki Electric Industry Co., Ltd. via the multi-chip project service of VDEC, the University of Tokyo. The initial test results and future plans for development are presented.
Conventional power estimation techniques are prone to many sources of error. With increasing dominance of coupling capacitances, capacitive coupling potentially contributes significantly to power consumption in the deep sub-micron regimes. We analyze potential sources of inaccuracy in power estimation, focusing on those due to coupling. Our results suggest that traditional power estimates can b...
This paper deals with design opportunities of Static Random Access Memory (SRAM) for low power consumption. Initially three major leakage current components are reviewed and then for a 6T SRAM cell, some of the leakage current reduction techniques are discussed. Finally double finger latch is analyzed and compared with single finger latch which shows reduction in sub threshold leakage current.
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