نتایج جستجو برای: depth chip level

تعداد نتایج: 1264735  

2014
Youngsook L. Jung Lovelace J. Luquette Joshua W.K. Ho Francesco Ferrari Michael Tolstorukov Aki Minoda Robbyn Issner Charles B. Epstein Gary H. Karpen Mitzi I. Kuroda Peter J. Park

In a chromatin immunoprecipitation followed by high-throughput sequencing (ChIP-seq) experiment, an important consideration in experimental design is the minimum number of sequenced reads required to obtain statistically significant results. We present an extensive evaluation of the impact of sequencing depth on identification of enriched regions for key histone modifications (H3K4me3, H3K36me3...

2009
Mario Frank Matthias Plaue Fred A. Hamprecht

Abstract Time-of-flight range sensors with on-chip continuous-wave correlation of radio frequency modulated signals are increasingly popular. They simultaneously deliver depth maps and intensity images with noise and systematic errors that are unique for this particular kind of data. Based on recent theoretical findings on the dominating noise processes we propose specific variants of normalize...

Journal: :Applied optics 2000
S Cha P C Lin L Zhu P C Sun Y Fainman

A confocal microscope profilometer, which incorporates chromatic depth scanning with a diffractive optical element and a digital micromirror device for configurable transverse scanning, provides three-dimensional (3D) quantitative measurements without mechanical translation of either the sample or the microscope. We used a microscope with various objective lenses (e.g., 40x, 60x, and 100x) to a...

2014
Vikas Upadhyay P. K. Jain N. K. Mehta

In machining of Ti-6Al-4V alloy, the formation of saw tooth chips takes place at relatively low cutting speeds in comparison to other materials such as hardened steels. Study of chip morphology is important to understand the cutting force variation, surface integrity and chip breakability of the alloy. In this work, an attempt has been made to study the effect of cutting speed, feed rate and de...

2008
F. Borghetti P. Malcovati F. Maloberti

This paper presents a current-mode 64 × 1 early vision chip, including integrated photodiodes and a programmable “perceptual engine”, which can implement various perceptual algorithms, such as Gabor filters. The proposed chip can be used for early vision tasks as edge detection, texture analysis, depth estimation and motion analysis. The perceptual engine exploits the properties of MOS transist...

1999
Guangming Lu Hartej Singh Ming-Hau Lee Nader Bagherzadeh Fadi J. Kurdahi Eliseu M. Chaves Filho Vladimir Castro Alves

MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reconfigurability and considerable depth of programmability. The first implementation of the MorphoSys architecture, the M1 chip, is currently at an advanced stage and it will operate at 100 MHz. Simulation results indicat...

2008
Wang Liwei Cao Yang Li Xiaohui Zhu Xiaohu

A buffer allocation algorithm for wormhole routing networks-on-chip was proposed. When the total budget of the available buffering space is fixed, the proposed algorithm automatically assigns the buffer depth for each input channel, in different routers across the chip, according to the traffic characteristics of the target application. The simulation results show that the buffer allocation res...

2007
Vasileios Liaskovitis Shimin Chen Phillip B. Gibbons Anastassia Ailamaki Guy E. Blelloch Babak Falsafi Limor Fix Nikos Hardavellas Michael Kozuch Todd C. Mowry Chris Wilkerson

1. ABSTRACT In chip multiprocessors (CMPs), limiting the number of off-chip cache misses is crucial for good performance. Many multithreaded programs provide opportunities for constructive cache sharing, in which concurrently scheduled threads share a largely overlapping working set. In this brief announcement, we highlight our ongoing study [4] comparing the performance of two schedulers desig...

Journal: :IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2007

Journal: :JCP 2008
Minjae Park Woonsik Lee Minh-Viet Nguyen Hwang Soo Lee

High-speed downlink packet access (HSDPA) has been developed to upgrade the current WCDMA system in yerms of providing a higher data rate for mobile users. To ensure a downlink speed of up to 14Mbps, the HSDPA system has three main features: adaptive modulation and coding, a hybrid automatic repeat request, and fast scheduling. Because standard documents describe only the specifications of Node...

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