We present a current output digital-to-analog converter (DAC) targeted for spacecraft applications. The DAC uses a switched current design and thermometer decoding guaranteeing monotonic behavior. Radiation Hard by Design techniques are used to mitigate potential total dose and Single Event Latch-up issues. A prototype DAC has been fabricated on a commercial 0.5μm process through the MOSIS serv...

In this article, an on-chip self-calibrated 8bit R-2R digital-to-analog converter (DAC) based on digitally compensated input offset of the operational amplifier (OPAMP) is presented. To improve the overall DAC performance, a digital offset cancellation method was used to compensate deviations in the input offset voltage of the OPAMP caused by process variations. The whole DAC as well as offset ...

A 10-bit 100-kS/s successive approximation register (SAR) analogto-digital converter (ADC) with rail-to-rail input range is proposed for a low power sensor interface. It consists of a time-domain comparator, a split capacitor-based digital-to-analog converter (SC-DAC) and a SAR logic. The time-domain comparator with an offset calibration technique is used to achieve a resolution of 10-bit. To r...

In a growing number of applications, there is need to digitize signals whose spectral characteristics are challenging for traditional Analog-to-Digital Converters (ADCs). Examples, among others, include systems where the ADC must acquire at once very wide but sparsely and dynamically occupied bandwidth supporting diverse services, as well signal interest subject strong narrowband co-channel int...

A new technique is proposed to eliminate the nonlinear error of a multibit digital-to-analog converter (DAC) used in a sigma-delta modulator where the solidity of multibit DAC against the clock jitter is reserved. By using dual quantization, this technique reduces the bit length of DAC to one bit and consequently eliminates its nonlinear error. A lowpass finite impulse response (FIR) filter wit...

Abstract A control-bounded analog-to-digital converter consists of a linear analog system that is subject to digital control, and filter estimates the input signal from control signals. Such converters have many commonalities with delta–sigma converters, but they can use more general filters. The paper describes operating principle, gives transfer function analysis, filtering. In addition, disc...

This paper presents a fast multiple sampling method for low-noise CMOS image sensor (CIS) applications with column-parallel successive approximation register analog-to-digital converters (SAR ADCs). The 12-bit SAR ADC using the proposed multiple sampling method decreases the A/D conversion time by repeatedly converting a pixel output to 4-bit after the first 12-bit A/D conversion, reducing nois...

This paper focuses on Design and Implementation of 10 Bit, 2MS/s successive approximation Register (SAR) Analog to digital converter (ADC) using Split DAC architecture. This SAR ADC architecture is designed and simulated using GPDK 0.18um CMOS technology. It consists of different blocks like sample and hold, comparator, Successive Approximation Register (SAR) and Split Digital to analog convert...