نتایج جستجو برای: eulerian graphs

تعداد نتایج: 102409  

2016
Orna Kupferman Gal Vardi

Labeled graphs, in which edges are labeled by letters from some alphabet Σ, are extensively used to model many types of relations associated with actions, costs, owners, or other properties. Each path in a labeled graph induces a word in Σ∗ – the one obtained by concatenating the letters along the edges in the path. Classical graph-theory problems give rise to new problems that take these words...

Journal: :Discrete Mathematics 2022

Motivated by the Eulerian ribbon graph minors, in this paper we introduce notion of checkerboard colourable minors for graphs and its dual: bipartite graphs. abstract graphs, another i.e. join are also introduced. Using these then give excluded minor characterizations classes plane

Journal: :Archive of Formal Proofs 2013
Wenda Li

This development provides a formalization of undirected graphs and simple graphs, which are based on Benedikt Nordhoff and Peter Lammich’s simple formalization of labelled directed graphs [4] in the archive. Then, with our formalization of graphs, we have shown both necessary and sufficient conditions for Eulerian trails and circuits [2] as well as the fact that the Königsberg Bridge problem do...

2011
Zhenghui Wang

Consider an undirected Eulerian graph, a graph in which each vertex has even degree. An Eulerian orientation of the graph is an orientation of its edges such that for each vertex v, the number of incoming edges of v equals to outgoing edges of v, i.e. din(v) = dout(v). Let P0 denote the set of all Eulerian orientations of graph G. In this paper, we are concerned with the questions of sampling u...

For a graph G, the irregularity and total irregularity of G are defined as irr(G)=∑_(uv∈E(G))〖|d_G (u)-d_G (v)|〗 and irr_t (G)=1/2 ∑_(u,v∈V(G))〖|d_G (u)-d_G (v)|〗, respectively, where d_G (u) is the degree of vertex u. In this paper, we characterize all ‎connected Eulerian graphs with the second minimum irregularity, the second and third minimum total irregularity value, respectively.

Journal: :Australasian J. Combinatorics 2015
S. B. Rao Uma Kant Sahoo

Let G(V,E) be a graph of order n and size m. A graceful labeling of G is an injection f : V (G) → {0, 1, 2, ...,m} such that, when each edge uv is assigned the label f(uv) = |f(u)− f(v)|, the resultant edge labels are distinct. We focus on general results in graceful labeling, and provide an affirmative answer to the following open problem: Can every connected graph be embedded as an induced su...

Journal: :J. Comb. Theory, Ser. B 2000
Genghua Fan Cun-Quan Zhang

Let G be an eulerian graph. For each vertex v # V(G), let P(v) be a partition of the edges incident with v and set P= v # V(G) P(v), called a forbidden system of G. We say that P is admissible if |P & T | 2 |T | for every P # P and every edge cut T of G. H. Fleischner and A. Frank (1990, J. Combin. Theory Ser. B 50, 245 253) proved that if G is planar and P is any admissible forbidden system of...

Journal: :CoRR 2011
Manuel Sorge

A directed graph is called Eulerian, if it contains a tour that traverses every arc in the graph exactly once. We study the problem of Eulerian Extension (EE) where a directed multigraph G and a weight function is given and it is asked whether G can be made Eulerian by adding arcs whose total weight does not exceed a given threshold. This problem is motivated through applications in vehicle rou...

2006
Zoltán Király Zoltán Szigeti

We present a characterization of Eulerian graphs that have a k-arc-connected orientation so that the deletion of any vertex results in a (k− 1)-arc-connected directed graph. This provides an affirmative answer for a conjecture of Frank [2]. The special case, when k = 2, describes Eulerian graphs admitting 2-vertexconnected orientations. This case was proved earlier by Berg and Jordán [1]. These...

Journal: :Discrete Mathematics 2002
Brigitte Servatius Herman Servatius

A dual-eulerian graph is a plane graph which has an ordering defined on its edge set which forms simultaneously an Euler circuit in the graph and an euler circuit in the dual graph. Dual-eulerian graphs were defined and studied in the context of silicon optimization of cmos layouts. They are necessarily of low connectivity with exponentially many planar embeddings. We give a polynomial time alg...

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