Short Abstract Most industrial digital circuits contain three-state elements besides pure logic gates. We like to presents a gate delay fault test generator for sequential circuits with standard scan design that can handle three-state elements like bus drivers, transmission gates and pulled busses. The delay test pattern generator is based on a well-proved stuck-at test pattern generator that w...

One of the key areas in which evolvable hardware has shown to excel is in achieving robust analogue and digital electronics. In this paper this domain is investigated further by manipulation of the digital abstraction. Some of the strict requirements of digital gates are relaxed in order to increase the complexity of the functionality available to evolution in order to evolve fault tolerant des...

For ordinary circuits with a xed upper bound on the fanin of its gates it has been shown that logarithmic redundancy is necessary and suucient to overcome random hardware faults (noise). Here, we consider the same question for unbounded fanin circuits which in the fault-free case can compute Boolean functions in sublogarithmic depth. Now the details of the fault model become more important. One...

One of the key areas in which evolvable hardware has been shown to excel is in achieving robust analogue and digital electronics. In this paper this domain is investigated further by manipulation of the digital abstraction. Some of the strict requirements of digital gates are relaxed in order to increase the complexity of the functionality available to evolution in order to evolve fault toleran...

Recently, Bravyi and König have shown that there is a trade-off between fault-tolerantly implementable logical gates and geometric locality of stabilizer codes. They consider locality-preserving operations which are implemented by a constant-depth geometrically-local circuit and are thus fault-tolerant by construction. In particular, they shown that, for local stabilizer codes in D spatial dime...

We present a method to perform fault-tolerant single-qubit gate operations using Landau-Zener tunneling. In a single Landau-Zener pulse, the qubit transition frequency is varied in time so that it passes through the frequency of the radiation field. We show that a simple three-pulse sequence allows eliminating errors in the gate up to the third order in errors in the qubit energies or the radia...

In certain approaches to quantum computing the operations between qubits are nondeterministic and likely to fail. For example, a distributed quantum processor would achieve scalability by networking together many small components; operations between components should be assumed to be failure prone. In the ultimate limit of this architecture each component contains only one qubit. Here we derive...

In earlier research we developed a theory for predicting the reliability of conventional sequential programs based on an estimate of residual faults. This paper describes how the theory was applied to a realistic industrial example containing a known number of faults. The industrial example was implemented in a PLC application language where the program is represented by a network of logic gate...