An all-optical transistor is a device in which a gate light pulse switches the transmission of a target light pulse with a gain above unity. The gain quantifies the change of the transmitted target photon number per incoming gate photon. We study the quantum limit of one incoming gate photon and observe a gain of 20. The gate pulse is stored as a Rydberg excitation in an ultracold gas. The tran...

Double gate MOSFET is widely used for sub-50nm technology of transistor design .They have immunity to short channel effects, reduced leakage current and high scaling potential. The single gate Silicon–on-insulator (SOI) devices give improved circuit speed and power consumption .But as the transistor size is reduced the close proximity between source and drain reduces the ability of the gate ele...

Direct tunneling current through the gate oxide is becoming a significant component of transistor leakage in deep sub-micron technology. This paper studies how gate leakage impacts the performance of analog CMOS ICs for the 90nm node. Results show that in DC referencing circuits such as current mirrors, a tradeoff exists between transistor width and mirrored reference current to improve accurac...

In this paper, the transient device performance analysis of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been evaluated. 3-D Bohm Quantum Potential (BQP) transport device simulation has been used to evaluate the delay and power dissipation performance. GI-JLT has a number of desirable device parameters such as reduced propagation delay, dynamic power dissipation, power and delay prod...

g ordon Moore’s prediction made over 40 years ago, that the number of transistors in an integrated circuit would double roughly every 24 months, continues to be the guiding principle of the semiconductor and computing industries. As transistor count increases, each transistor becomes smaller, faster and cheaper, leading to an unprecedented increase in microprocessor performance1. Today, the so-...

Abstract-Low-voltage and low-power circuit structures are substantive for almost all mobile electronic gadgets which generally have mixed mode circuit structures embedded with analog sub-sections. Using the reconfigurable logic of multiinput floating gate MOSFETs, 4-bit full adder has been designed for 1.8V operation. Multi-input floating gate (MIFG) transistors have been anticipating in realiz...

This letter addresses the design, implementation, and characterization of a novel high-density Triple Gate Transistor in 40 nm embedded Non-Volatile Memory technology. Deep trenches are used to integrate two vertical transistors connected parallel with main planar transistor. Thanks built-in trenches, proposed manufacturing process increases transistor width without impacting its footprint. The...

transistor has been extensively studied and its application to multi-bit/cell Flash device has been also presented. The scaling issues of SONOS memory is generally addressed in terms of both NAND and NOR Flash application. In the case of NAND SONOS Flash, there are some significant process integration issues about selection transistor, contact resistance, gate filling process margin, and dielec...

The neuron-MOS (neu-MOS) transistor, recently discovered by Shibata and Ohmi in 1991 [T. Shibata, T. Ohmi, International Electron Devices Meeting, Technical Digest, 1991] uses capacitively coupled inputs onto a floating gate. Neu-MOS enables the design of conventional analog and digital integrated circuits with a significant reduction in transistor count [L.S.Y. Wong, C.Y. Kwok, G.A. Rigby, in:...

Based on the understanding of flicker noise generation in “silicon metal-oxide semiconductor field-effect transistors” (MOSFETs), a novel method for improving the phase noise performance of a CMOS LC oscillator is presented. Zhou et al. and Hoogee have suggested that the 1 noise can be reduced through a switched gate, and the flicker noise generated is inversely proportional to the gate switchi...