A high performance InP/InGaAs SHBT technology will be presented. InP SHBT is advantageous in terms of low-cost monolithic integration with photodiodes for high-speed optical receiver frontend applications. We will demonstrate that, through optimized CAD geometries, the fabricated HBTs showed uniform and improved device performance. Our best results show that an fT of over 160 GHz and fmax of gr...

By combining capacitance–voltage measurements, TCAD simulations, and X-ray photoelectron spectroscopy, the impact of work function gate metals Ti, Mo, Pd, Ni on defects in bulk HfO2 at HfO2/InGaAs interfaces are studied. The oxidation Ti/HfO2 is found to create highest density interface border traps, while a stable Mo/HfO2 leads smallest traps our sample. extracted values Dit 1.27 × 1011 eV−1cm...

InAlAs:Be/InGaAs superlattices grown at low temperatures were investigated in this study. To obtain the highest resistivity and mobility simultaneously, a growth temperature above 200 °C was applied. The electrical properties conducted via Hall effect measurement photoresponse test. experimental results demonstrate that sample 257.5~260 exhibits (1290 Ω × cm) lowest carrier concentration (3.18 ...

We describe a fabrication process which forms InGaAs fins with sub 10nm thickness and 180nm height. The process flow requires no semiconductor dry-etch, thereby avoiding surface damage arising from such processes. Instead, InGaAs fins are formed using nanometer controlled atomic layer epitaxial growth, using tertiarybutylarsine, upon InP sidewall which are eventually selectively etched. Such fi...

We propose a spin interferometer using Rashba spin–orbit interaction. A spin interference effect is demonstrated in small arrays of mesoscopic InGaAs rings. This spin interference is the time reversal Aharonov– Casher (AC) effect. The AC interference oscillations are controlled over several periods. This result shows evidence for electrical manipulation of the spin precession angle in an InGaAs...

Formation of a contaminant free, flat, electrically passive interface to a gate oxide such as a-Al(2)O(3) is the critical step in fabricating III-V metal oxide semiconductor field effect transistors; while the bulk oxide is amorphous, the interface may need to be ordered to prevent electrical defect formation. A two temperature in situ cleaning process is shown to produce a clean, flat group II...

InGaAsP/InP multiple quantum wells with quantum well intermixing (QWI) have been prepared by Impurity-Free Vacancy Disordering (IFVD). The luminescent characteristics were investigated using photoluminescence (PL) and photoreflectance (PR), from which the band gap blueshift was observed. Si3N4, SiO2 and SOG (spin on glass) were used for the dielectric layer to enhance intermixing from the outdi...

InAlAs/InGaAs/InP based high electron mobility transistor devices have been structurally and electrically characterized, using transmission electron microscopy and Raman spectroscopy and measuring Hall mobilities. The InGaAs lattice matched channels, with an In molar fraction of 53%, grown at temperatures lower than 530 °C exhibit alloy decomposition driving an anisotropic InGaAs surface roughn...

Impurity-induced layer disordering (IILD) can create active and passive devices with very narrow lateral optical and electrical confinement through well-controlled implantations or diffusions. Optical waveguides, heterostructure lasers, and lateral heterojunction bipolar transistors (HBTs) have been realized by IILD.ie3 Optoelectronic integrated circuits (OEICs) consisting of lasers and fieldef...

Towards the demonstration of sub-10 nm III-V vertical fin and nanowire MOSFETs, a novel alcohol-based digital-etch technology has been developed. The new technique minimizes the mechanical forces exerted on vertical nanowire structures. A consistent 1 nm/cycle etching rate on both InGaAs and InGaSb-based heterostructures has been obtained. This is the first demonstration of digital etch on anti...