نتایج جستجو برای: lut block

تعداد نتایج: 159747  

2014
M. Devipriya V. Saravanan N. Santhiyakumari

In silicon on chip technology demands high performance and low power Very Large Scale Integrated Circuit (VLSI) digital signal processing (DSP) systems. The aim of this paper explores the power consumption technique for the architecture of Finite Impulse Response (FIR) adaptive filter. An adaptive FIR filter with Block Least Mean Square (BLMS) algorithm was developed to reduce the power. Distri...

2013
Navya Deepthi A. Ruhan Bevi V. Sai Keerthi

In this paper we designed a new type of Random number generator by using shift registers and LUT with D-FF as input to it. The algorithm used to generate random numbers is realized using simple xor circuit and implemented on a Virtex II FPGA from Xilinx. This designed block indicate a good sequence of random numbers which is used in high-speed data processor, Testing Instruments, Finding Laser ...

2000
Jörn Gause

This paper presents an investigation of Look-Up Table (LUT) based Field Programmable Gate Arrays (FPGAs) using various architectures of the Inverse Discrete Cosine Transform (IDCT). To compare FPGA architectures of different vendors, a generic FPGA model is developed and used in architecture independent modelling software. LUTs with three inputs yield the best results in terms of area when mapp...

2003
J. Soares Augusto Carlos Beltrán Almeida H. C. Campos Neto

In this paper, we describe a modular reconfigurable architecture for efficient stuck-at fault simulation in digital circuits. The architecture is based on a Universal Faulty Gate Block, which models each 2-input gate by a 4-input Look-Up Table (LUT) and a Shift-Register (SR) with 3 stages, and relies on colapsing the stuck-at fault list of the gates using equivalence and dominance relations bet...

2006
Roman Kohut Bernd Steinbach Dominik Fröhlich

This paper suggests a new approach for modeling of Boolean neural networks on fieldprogrammable gate arrays (FPGAs) using UML. The presented Boolean neural networks (BNN) allow a decreasing of the required number of configurable logic blocks (CLB) for the realizing of Boolean neuron. The element of BNN, called Boolean neuron, may be mapped directly to lookup table (LUT) and configurable logic b...

R. Sharifiyan Attar S.A. Mazhari

Apatite minerals of I-type Zouzan granitoids and typical garnet-bearing S-type granites have been analyzed by electron microprobe to define trace element concentrations and compare them in different granites. Zouzan granites are composed of apatites with lower Fe, Mn, Na and HREE and higher REE and ∑REE relative to S-type ones. Trace elements abundances of apatite often vary with some parameter...

2016
Miaomiao Yan Zhongrong Liu Huilan Yang Cuihua Li Hulin Chen Yan Liu Minling Zhao Yingjie Zhu

Luteolin (LUT) is a flavone, which is universally present as a constituent of traditional Chinese herbs, and certain vegetables and spices, and has been demonstrated to exhibit potent radical scavenging and cytoprotective properties. Although LUT has various beneficial effects on health, the effects of LUT on the protection of skin remain to be fully elucidated. The present study investigated w...

2004
Tsutomu SASAO Masaki KUSANO Munehiro MATSUURA

A Look-Up Table (LUT) ring consists of memories, programmable interconnections and a control circuit. It sequentially emulates an LUT cascade representing a multipleoutput logic function. In this paper, we consider the realization of multi-output functions with LUT rings using large memories. In contrast to previous approaches where the number of inputs to each LUT cell is fixed, we allow the n...

2007
ALEXANDER CARRASCO HUGO LEIVA

This paper presents a variation of constants formula for the system of functional parabolic partial differential equations ∂u(t, x) ∂t = D∆u+ Lut + f(t, x), t > 0, u ∈ R ∂u(t, x) ∂η = 0, t > 0, x ∈ ∂Ω u(0, x) = φ(x) u(s, x) = φ(s, x), s ∈ [−τ, 0), x ∈ Ω . Here Ω is a bounded domain in Rn, the n × n matrix D is block diagonal with semi-simple eigenvalues having non negative real part, the operat...

2014
V. Anil kumar M.Ajith Rao

Image compression is the reduction or elimination of redundancy in data representation in order to achieve reduction in storage and communication cost. For this we use the simple computational method, 2D-DCT, using two 1D-DCT performed on matrix of (8X8). The DCT is a technique that converts a signal from spatial domain to frequency domain. Here we first convert the image into minimum code unit...

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